[nRF52] minor update of GPIO map

lyusupov · Jul 8, 2024 · d077c5d · d077c5d
1 parent 6c1f8ab
commit d077c5d
Show file tree

Hide file tree

Showing 2 changed files with 118 additions and 53 deletions.
diff --git a/software/firmware/source/SoftRF/src/platform/nRF52.cpp b/software/firmware/source/SoftRF/src/platform/nRF52.cpp
@@ -725,7 +725,19 @@ static void nRF52_setup()
   delay(200);
 
 #if !defined(ARDUINO_ARCH_MBED)
-  Wire.setPins(SOC_GPIO_PIN_SDA, SOC_GPIO_PIN_SCL);
+  switch (nRF52_board)
+  {
+    case NRF52_LILYGO_TULTIMA:
+      Wire.setPins(SOC_GPIO_PIN_TULTIMA_SDA, SOC_GPIO_PIN_TULTIMA_SCL);
+      break;
+    case NRF52_LILYGO_TECHO_REV_0:
+    case NRF52_LILYGO_TECHO_REV_1:
+    case NRF52_LILYGO_TECHO_REV_2:
+    case NRF52_NORDIC_PCA10059:
+    default:
+      Wire.setPins(SOC_GPIO_PIN_SDA, SOC_GPIO_PIN_SCL);
+      break;
+  }
 #endif /* ARDUINO_ARCH_MBED */
   Wire.begin();
 
@@ -1780,14 +1792,26 @@ static void nRF52_EEPROM_extension(int cmd)
 static void nRF52_SPI_begin()
 {
 #if !defined(ARDUINO_ARCH_MBED)
-  if (nRF52_board == NRF52_NORDIC_PCA10059) {
-    SPI.setPins(SOC_GPIO_PIN_PCA10059_MISO,
-                SOC_GPIO_PIN_PCA10059_SCK,
-                SOC_GPIO_PIN_PCA10059_MOSI);
-  } else {
-    SPI.setPins(SOC_GPIO_PIN_TECHO_REV_0_MISO,
-                SOC_GPIO_PIN_TECHO_REV_0_SCK,
-                SOC_GPIO_PIN_TECHO_REV_0_MOSI);
+  switch (nRF52_board)
+  {
+    case NRF52_LILYGO_TULTIMA:
+      SPI.setPins(SOC_GPIO_PIN_TULTIMA_MISO,
+                  SOC_GPIO_PIN_TULTIMA_SCK,
+                  SOC_GPIO_PIN_TULTIMA_MOSI);
+      break;
+    case NRF52_NORDIC_PCA10059:
+      SPI.setPins(SOC_GPIO_PIN_PCA10059_MISO,
+                  SOC_GPIO_PIN_PCA10059_SCK,
+                  SOC_GPIO_PIN_PCA10059_MOSI);
+      break;
+    case NRF52_LILYGO_TECHO_REV_0:
+    case NRF52_LILYGO_TECHO_REV_1:
+    case NRF52_LILYGO_TECHO_REV_2:
+    default:
+      SPI.setPins(SOC_GPIO_PIN_TECHO_REV_0_MISO,
+                  SOC_GPIO_PIN_TECHO_REV_0_SCK,
+                  SOC_GPIO_PIN_TECHO_REV_0_MOSI);
+      break;
   }
 #endif /* ARDUINO_ARCH_MBED */
 
@@ -1797,7 +1821,20 @@ static void nRF52_SPI_begin()
 static void nRF52_swSer_begin(unsigned long baud)
 {
 #if !defined(ARDUINO_ARCH_MBED)
-  Serial_GNSS_In.setPins(SOC_GPIO_PIN_GNSS_RX, SOC_GPIO_PIN_GNSS_TX);
+  switch (nRF52_board)
+  {
+    case NRF52_LILYGO_TULTIMA:
+      Serial_GNSS_In.setPins(SOC_GPIO_PIN_GNSS_TULTIMA_RX,
+                             SOC_GPIO_PIN_GNSS_TULTIMA_TX);
+      break;
+    case NRF52_LILYGO_TECHO_REV_0:
+    case NRF52_LILYGO_TECHO_REV_1:
+    case NRF52_LILYGO_TECHO_REV_2:
+    case NRF52_NORDIC_PCA10059:
+    default:
+      Serial_GNSS_In.setPins(SOC_GPIO_PIN_GNSS_RX, SOC_GPIO_PIN_GNSS_TX);
+      break;
+  }
 #endif /* ARDUINO_ARCH_MBED */
   Serial_GNSS_In.begin(baud);
 }

diff --git a/software/firmware/source/SoftRF/src/platform/nRF52.h b/software/firmware/source/SoftRF/src/platform/nRF52.h
@@ -116,17 +116,24 @@ struct rst_info {
 #define MIDI_CHANNEL_VARIO    2
 
 /* Peripherals */
-#define SOC_GPIO_PIN_CONS_RX  _PINNUM(0, 8) // P0.08
-#define SOC_GPIO_PIN_CONS_TX  _PINNUM(0, 6) // P0.06
+#define SOC_GPIO_PIN_CONS_RX            _PINNUM(0, 8) // P0.08
+#define SOC_GPIO_PIN_CONS_TX            _PINNUM(0, 6) // P0.06
 
-#define SOC_GPIO_PIN_GNSS_RX  _PINNUM(1, 9) // P1.09
-#define SOC_GPIO_PIN_GNSS_TX  _PINNUM(1, 8) // P1.08
+#define SOC_GPIO_PIN_GNSS_RX            _PINNUM(1, 9) // P1.09
+#define SOC_GPIO_PIN_GNSS_TX            _PINNUM(1, 8) // P1.08
 
-#define SOC_GPIO_PIN_LED      SOC_UNUSED_PIN
+#define SOC_GPIO_PIN_GNSS_PPS           _PINNUM(1, 4) // P1.04
+#define SOC_GPIO_PIN_GNSS_WKE           _PINNUM(1, 2) // P1.02
+#define SOC_GPIO_PIN_GNSS_RST           _PINNUM(1, 5) // P1.05 (REV_2 only)
 
-#define SOC_GPIO_PIN_GNSS_PPS _PINNUM(1, 4) // P1.04
-#define SOC_GPIO_PIN_GNSS_WKE _PINNUM(1, 2) // P1.02
-#define SOC_GPIO_PIN_GNSS_RST _PINNUM(1, 5) // P1.05 (REV_2 only)
+#define SOC_GPIO_PIN_GNSS_TULTIMA_RX    _PINNUM(1, 7) // P1.07
+#define SOC_GPIO_PIN_GNSS_TULTIMA_TX    _PINNUM(1, 5) // P1.05
+
+#define SOC_GPIO_PIN_GNSS_TULTIMA_PPS   _PINNUM(1, 6) // P1.06
+#define SOC_GPIO_PIN_GNSS_TULTIMA_IRQ   _PINNUM(1, 4) // P1.04
+#define SOC_GPIO_PIN_GNSS_TULTIMA_RST   SOC_UNUSED_PIN // TBD
+
+#define SOC_GPIO_PIN_LED                SOC_UNUSED_PIN
 
 #define SOC_GPIO_LED_TECHO_REV_0_GREEN  _PINNUM(0, 13) // P0.13 (Green)
 #define SOC_GPIO_LED_TECHO_REV_0_RED    _PINNUM(0, 14) // P0.14 (Red)
@@ -158,10 +165,10 @@ struct rst_info {
                                hw_info.revision == 2 ? SOC_GPIO_LED_TECHO_REV_2_BLUE : \
                                SOC_GPIO_LED_PCA10059_BLUE)
 
-#define SOC_GPIO_PIN_BATTERY  _PINNUM(0, 4) // P0.04 (AIN2)
+#define SOC_GPIO_PIN_BATTERY            _PINNUM(0, 4) // P0.04 (AIN2)
 
-#define SOC_GPIO_PIN_RX3      SOC_UNUSED_PIN
-#define SOC_GPIO_PIN_TX3      SOC_UNUSED_PIN
+#define SOC_GPIO_PIN_RX3                SOC_UNUSED_PIN
+#define SOC_GPIO_PIN_TX3                SOC_UNUSED_PIN
 
 /* SPI */
 #define SOC_GPIO_PIN_TECHO_REV_0_MOSI   _PINNUM(0, 22) // P0.22
@@ -184,10 +191,15 @@ struct rst_info {
 #define SOC_GPIO_PIN_WB_SCK             _PINNUM(1, 11) // P1.11
 #define SOC_GPIO_PIN_WB_SS              _PINNUM(1, 10) // P1.10
 
+#define SOC_GPIO_PIN_TULTIMA_MOSI       _PINNUM(0, 27) // P0.27
+#define SOC_GPIO_PIN_TULTIMA_MISO       _PINNUM(1, 14) // P0.14
+#define SOC_GPIO_PIN_TULTIMA_SCK        _PINNUM(0,  3) // P0.03
+#define SOC_GPIO_PIN_TULTIMA_SS         _PINNUM(0, 23) // P0.23
+
 /* NRF905 */
-#define SOC_GPIO_PIN_TXE      SOC_UNUSED_PIN
-#define SOC_GPIO_PIN_CE       SOC_UNUSED_PIN
-#define SOC_GPIO_PIN_PWR      SOC_UNUSED_PIN
+#define SOC_GPIO_PIN_TXE                SOC_UNUSED_PIN
+#define SOC_GPIO_PIN_CE                 SOC_UNUSED_PIN
+#define SOC_GPIO_PIN_PWR                SOC_UNUSED_PIN
 
 /* SX1262 or SX1276 */
 #define SOC_GPIO_PIN_TECHO_REV_0_RST    _PINNUM(0, 25) // P0.25
@@ -197,21 +209,28 @@ struct rst_info {
 #define SOC_GPIO_PIN_TECHO_REV_0_DIO0   SOC_UNUSED_PIN
 #define SOC_GPIO_PIN_TECHO_REV_1_DIO0   _PINNUM(1,  1) // P1.01
 #define SOC_GPIO_PIN_TECHO_REV_2_DIO0   _PINNUM(0, 15) // P0.15
-#define SOC_GPIO_PIN_DIO1     _PINNUM(0, 20) // P0.20
-#define SOC_GPIO_PIN_BUSY     _PINNUM(0, 17) // P0.17
+#define SOC_GPIO_PIN_DIO1               _PINNUM(0, 20) // P0.20
+#define SOC_GPIO_PIN_BUSY               _PINNUM(0, 17) // P0.17
 
-#define SOC_GPIO_PIN_WB_RST   _PINNUM(1,  6) // P1.06
-#define SOC_GPIO_PIN_WB_DIO1  _PINNUM(1, 15) // P1.15
-#define SOC_GPIO_PIN_WB_BUSY  _PINNUM(1, 14) // P1.14
+#define SOC_GPIO_PIN_WB_RST             _PINNUM(1,  6) // P1.06
+#define SOC_GPIO_PIN_WB_DIO1            _PINNUM(1, 15) // P1.15
+#define SOC_GPIO_PIN_WB_BUSY            _PINNUM(1, 14) // P1.14
+
+#define SOC_GPIO_PIN_TULTIMA_RST        _PINNUM(0, 25) // P0.25
+#define SOC_GPIO_PIN_TULTIMA_DIO1       _PINNUM(0, 15) // P0.15
+#define SOC_GPIO_PIN_TULTIMA_BUSY       _PINNUM(0, 17) // P0.17
 
 /* RF antenna switch */
-#define SOC_GPIO_PIN_ANT_RXTX SOC_UNUSED_PIN
-#define SOC_GPIO_PIN_WB_TXEN  _PINNUM(1,  7) // P1.07
-#define SOC_GPIO_PIN_WB_RXEN  _PINNUM(1,  5) // P1.05
+#define SOC_GPIO_PIN_ANT_RXTX           SOC_UNUSED_PIN
+#define SOC_GPIO_PIN_WB_TXEN            _PINNUM(1,  7) // P1.07
+#define SOC_GPIO_PIN_WB_RXEN            _PINNUM(1,  5) // P1.05
 
 /* I2C */
-#define SOC_GPIO_PIN_SDA      _PINNUM(0, 26) // P0.26
-#define SOC_GPIO_PIN_SCL      _PINNUM(0, 27) // P0.27
+#define SOC_GPIO_PIN_SDA                _PINNUM(0, 26) // P0.26
+#define SOC_GPIO_PIN_SCL                _PINNUM(0, 27) // P0.27
+
+#define SOC_GPIO_PIN_TULTIMA_SDA        _PINNUM(1,  1) // P1.01
+#define SOC_GPIO_PIN_TULTIMA_SCL        _PINNUM(1,  3) // P1.03
 
 /* buttons */
 #define SOC_GPIO_PIN_TECHO_REV_0_BUTTON _PINNUM(1, 10) // P1.10
@@ -225,35 +244,44 @@ struct rst_info {
                                SOC_GPIO_PIN_TECHO_REV_0_BUTTON)
 
 /* E-paper */
-#define SOC_GPIO_PIN_EPD_MISO _PINNUM(1,  7) // P1.07
-#define SOC_GPIO_PIN_EPD_MOSI _PINNUM(0, 29) // P0.29
-#define SOC_GPIO_PIN_EPD_SCK  _PINNUM(0, 31) // P0.31
-#define SOC_GPIO_PIN_EPD_SS   _PINNUM(0, 30) // P0.30
-#define SOC_GPIO_PIN_EPD_DC   _PINNUM(0, 28) // P0.28
-#define SOC_GPIO_PIN_EPD_RST  _PINNUM(0,  2) // P0.02
-#define SOC_GPIO_PIN_EPD_BUSY _PINNUM(0,  3) // P0.03
-#define SOC_GPIO_PIN_EPD_BLGT _PINNUM(1, 11) // P1.11
+#define SOC_GPIO_PIN_EPD_MISO           _PINNUM(1,  7) // P1.07
+#define SOC_GPIO_PIN_EPD_MOSI           _PINNUM(0, 29) // P0.29
+#define SOC_GPIO_PIN_EPD_SCK            _PINNUM(0, 31) // P0.31
+#define SOC_GPIO_PIN_EPD_SS             _PINNUM(0, 30) // P0.30
+#define SOC_GPIO_PIN_EPD_DC             _PINNUM(0, 28) // P0.28
+#define SOC_GPIO_PIN_EPD_RST            _PINNUM(0,  2) // P0.02
+#define SOC_GPIO_PIN_EPD_BUSY           _PINNUM(0,  3) // P0.03
+#define SOC_GPIO_PIN_EPD_BLGT           _PINNUM(1, 11) // P1.11
+
+#define SOC_GPIO_PIN_EPD_TULTIMA_MISO   _PINNUM(0, 14) // P0.14
+#define SOC_GPIO_PIN_EPD_TULTIMA_MOSI   _PINNUM(0, 26) // P0.26
+#define SOC_GPIO_PIN_EPD_TULTIMA_SCK    _PINNUM(0,  4) // P0.04
+#define SOC_GPIO_PIN_EPD_TULTIMA_SS     _PINNUM(0, 11) // P0.11
+#define SOC_GPIO_PIN_EPD_TULTIMA_DC     _PINNUM(0,  7) // P0.07
+#define SOC_GPIO_PIN_EPD_TULTIMA_RST    _PINNUM(1,  8) // P1.08
+#define SOC_GPIO_PIN_EPD_TULTIMA_BUSY   _PINNUM(0,  5) // P0.05
+#define SOC_GPIO_PIN_EPD_TULTIMA_BLGT   _PINNUM(1, 11) // P1.11
 
 /* Power: EINK, RGB, CN1 (, RF) REV_2: FLASH, GNSS, SENSOR */
-#define SOC_GPIO_PIN_IO_PWR   _PINNUM(0, 12) // P0.12
+#define SOC_GPIO_PIN_IO_PWR             _PINNUM(0, 12) // P0.12
 /* REV_2 power: RF */
-#define SOC_GPIO_PIN_3V3_PWR  _PINNUM(0, 13) // P0.13
+#define SOC_GPIO_PIN_3V3_PWR            _PINNUM(0, 13) // P0.13
 /* Modded REV_1 3V3 power */
 #define SOC_GPIO_PIN_TECHO_REV_1_3V3_PWR  SOC_GPIO_PIN_TECHO_REV_1_DIO0
 
 /* MX25R1635F SPI flash */
-#define SOC_GPIO_PIN_SFL_MOSI _PINNUM(1, 12) // P1.12
-#define SOC_GPIO_PIN_SFL_MISO _PINNUM(1, 13) // P1.13
-#define SOC_GPIO_PIN_SFL_SCK  _PINNUM(1, 14) // P1.14
-#define SOC_GPIO_PIN_SFL_SS   _PINNUM(1, 15) // P1.15
-#define SOC_GPIO_PIN_SFL_HOLD _PINNUM(0,  5) // P0.05 (REV_1 and REV_2)
-#define SOC_GPIO_PIN_SFL_WP   _PINNUM(0,  7) // P0.07 (REV_1 and REV_2)
+#define SOC_GPIO_PIN_SFL_MOSI           _PINNUM(1, 12) // P1.12
+#define SOC_GPIO_PIN_SFL_MISO           _PINNUM(1, 13) // P1.13
+#define SOC_GPIO_PIN_SFL_SCK            _PINNUM(1, 14) // P1.14
+#define SOC_GPIO_PIN_SFL_SS             _PINNUM(1, 15) // P1.15
+#define SOC_GPIO_PIN_SFL_HOLD           _PINNUM(0,  5) // P0.05 (REV_1 and REV_2)
+#define SOC_GPIO_PIN_SFL_WP             _PINNUM(0,  7) // P0.07 (REV_1 and REV_2)
 
 /* RTC */
-#define SOC_GPIO_PIN_R_INT    _PINNUM(0, 16) // P0.16
+#define SOC_GPIO_PIN_R_INT              _PINNUM(0, 16) // P0.16
 
-#define SOC_GPIO_PMU_SDA      _PINNUM(1,  0) // P1.00
-#define SOC_GPIO_PMU_SCL      _PINNUM(0, 24) // P0.24
+#define SOC_GPIO_PMU_SDA                _PINNUM(1,  0) // P1.00
+#define SOC_GPIO_PMU_SCL                _PINNUM(0, 24) // P0.24
 
 #define EXCLUDE_WIFI
 //#define EXCLUDE_OTA