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[Benchmark] Rename the dual clock counter benchmark to follow the nam…
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…ing convention on counter benchmarks
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tangxifan committed Jul 2, 2021
1 parent 8baf606 commit 5a6874e
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
module counter4bit_2clock(clk0, rst0, clk1, rst1, q0, q1);
module counter_4bit_2clock(clk0, rst0, clk1, rst1, q0, q1);

input clk0;
input rst0;
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Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
module counter4bit_2clock_tb;
module counter_4bit_2clock_tb;

reg clk0, rst0;
wire [3:0] q0;

reg clk1, rst1;
wire [3:0] q1;

counter_2clock C_1(
counter_4bit_2clock C_1(
clk0,
q0,
rst0);

counter_2clock C_1(
counter_4bit_2clock C_1(
clk1,
q1,
rst1);
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