[platform][vc4] fix time resolution, start genet driver, fix rpi2-tes…

…t build

arch/vc4/timer.c

@@ -10,11 +10,11 @@ static enum handler_return timer0_irq(void *arg);
 
 lk_bigtime_t current_time_hires(void) {
   //TODO, deal with rollover
-  return ( ((lk_bigtime_t)*REG32(ST_CHI)) << 32) | *REG32(ST_CLO);
+  return (( ((lk_bigtime_t)*REG32(ST_CHI)) << 32) | *REG32(ST_CLO)) / 1000;
 }
 
 lk_time_t current_time(void) {
-  return *REG32(ST_CLO);
+  return current_time_hires();
 }
 
 static platform_timer_callback timer_cb = 0;;

platform/bcm28xx/genet.c

@@ -0,0 +1,27 @@
+// based on drivers/net/ethernet/broadcom/genet/bcmgenet.c from linux
+// for PHY control, look at the cmd_bits variable in drivers/net/ethernet/broadcom/genet/bcmmii.c
+
+#include <lk/reg.h>
+#include <stdio.h>
+#include <lk/console_cmd.h>
+#include <platform/bcm28xx.h>
+#include <lk/debug.h>
+
+static int cmd_genet_dump(int argc, const cmd_args *argv);
+
+STATIC_COMMAND_START
+STATIC_COMMAND("dump_genet", "print genet information", &cmd_genet_dump)
+STATIC_COMMAND_END(genet);
+
+#define SYS_REV_CTRL (GENET_BASE + 0x0)
+
+static int cmd_genet_dump(int argc, const cmd_args *argv) {
+  uint32_t reg = *REG32(SYS_REV_CTRL);
+  uint8_t major = (reg >> 24 & 0x0f);
+  if (major == 6) major = 5;
+  else if (major == 5) major = 4;
+  else if (major == 0) major = 1;
+
+  dprintf(INFO, "found GENET controller version %d\n", major);
+  return 0;
+}

platform/bcm28xx/include/platform/bcm28xx.h

@@ -55,6 +55,7 @@
 #define SMI_BASE                (BCM_PERIPH_BASE_VIRT + 0x600000)
 #define BSC1_BASE               (BCM_PERIPH_BASE_VIRT + 0x804000)
 #define USB_BASE                (BCM_PERIPH_BASE_VIRT + 0x980000)
+#define GENET_BASE              (0x7d580000) // TODO, this is before the normal BCM_PERIPH_BASE_VIRT bank
 #define MCORE_BASE              (BCM_PERIPH_BASE_VIRT + 0x0000)
 
 #define ST_CS                   (ST_BASE + 0x0)
@@ -70,12 +71,14 @@
 #define IC0_SRC0                (IC0_BASE + 0x8)
 #define IC0_SRC1                (IC0_BASE + 0xc)
 #define IC0_VADDR               (IC0_BASE + 0x30)
+#define IC0_WAKEUP              (IC0_BASE + 0x34)
 
 #define IC1_C                   (IC1_BASE + 0x0)
 #define IC1_S                   (IC1_BASE + 0x4)
 #define IC1_SRC0                (IC1_BASE + 0x8)
 #define IC1_SRC1                (IC1_BASE + 0xc)
 #define IC1_VADDR               (IC1_BASE + 0x30)
+#define IC1_WAKEUP              (IC1_BASE + 0x34)
 
 #define PM_PASSWORD 0x5a000000
 #define PM_RSTC                 (PM_BASE + 0x1c)

platform/bcm28xx/rules.mk

@@ -5,12 +5,28 @@ MODULE := $(LOCAL_DIR)
 WITH_SMP := 1
 #LK_HEAP_IMPLEMENTATION ?= dlmalloc
 
-ifeq ($(ARCJ),arm)
-MODULE_DEPS := \
+# 1st pass to set arch
+ifeq ($(TARGET),rpi2)
+  ARCH := arm
+  ARM_CPU := cortex-a7
+  GLOBAL_DEFINES += CRYSTAL=19200000
+else ifeq ($(TARGET),rpi3)
+  ARCH := arm64
+  ARM_CPU := cortex-a53
+  GLOBAL_DEFINES += CRYSTAL=19200000
+else ifeq ($(TARGET),rpi4-vpu)
+  ARCH ?= vc4
+  GLOBAL_DEFINES += CRYSTAL=54000000
+endif
+
+
+ifeq ($(ARCH),arm)
+MODULE_DEPS += \
 	dev/timer/arm_generic \
 	lib/cbuf
-MODULE_SRCS +=
+MODULE_SRCS += \
 	$(LOCAL_DIR)/mailbox.c \
+	$(LOCAL_DIR)/intc.c \
 
 endif
 
@@ -24,7 +40,6 @@ endif
 MODULE_SRCS += \
 	$(LOCAL_DIR)/gpio.c \
 	$(LOCAL_DIR)/platform.c \
-	#$(LOCAL_DIR)/intc.c \
 
 
 MEMBASE := 0x00000000
@@ -36,8 +51,6 @@ LINKER_SCRIPT += \
 	$(BUILDDIR)/system-onesegment.ld
 
 ifeq ($(TARGET),rpi2)
-ARCH := arm
-ARM_CPU := cortex-a7
 # put our kernel at 0x80000000
 KERNEL_BASE = 0x80000000
 KERNEL_LOAD_OFFSET := 0x00008000
@@ -50,8 +63,6 @@ MODULE_SRCS += \
 	$(LOCAL_DIR)/uart.c
 
 else ifeq ($(TARGET),rpi3)
-ARCH := arm64
-ARM_CPU := cortex-a53
 
 KERNEL_LOAD_OFFSET := 0x00080000
 MEMSIZE ?= 0x40000000 # 1GB
@@ -70,18 +81,17 @@ MODULE_DEPS += \
 	    app/tests \
 	    lib/fdt
 else ifeq ($(TARGET),rpi4-vpu)
-ARCH ?= vc4
 MEMSIZE ?= 0x1400000 # 20MB
 MEMBASE ?= 0
 GLOBAL_DEFINES += \
     BCM2XXX_VPU=1 SMP_MAX_CPUS=1 \
     MEMSIZE=$(MEMSIZE) \
     MEMBASE=$(MEMBASE) \
-    CRYSTAL=54000000 \
 
 MODULE_SRCS += \
 	$(LOCAL_DIR)/uart.c \
 	$(LOCAL_DIR)/pll_read.c \
+	$(LOCAL_DIR)/genet.c \
 
 endif
 

platform/bcm28xx/uart.c

@@ -102,7 +102,6 @@ void uart_init(void) {
         // assumes interrupts are contiguous
         register_int_handler(INTERRUPT_VC_UART + i, &uart_irq, (void *)i);
         uint32_t divisor = calculate_baud_divisor(115200);
-        dprintf(INFO, "changing divisor to %d\n", divisor);
 
         uart_flush(i);