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Vendorize CVA6 core submodules (common_cells, FPU with related sub-mo…
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…dules) (openhwgroup#1007)
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zchamski authored Dec 9, 2022
1 parent b817386 commit 8a5898d
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Showing 188 changed files with 25,749 additions and 331 deletions.
106 changes: 53 additions & 53 deletions Bender.yml
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ package:
# WT_DCACHE

export_include_dirs:
- common/submodules/common_cells/include/
- vendor/pulp-platform/common_cells/include/
- corev_apu/axi/include/

sources:
Expand All @@ -28,8 +28,8 @@ sources:
- corev_apu/tb/ariane_axi_soc_pkg.sv
- core/include/ariane_axi_pkg.sv
- core/include/std_cache_pkg.sv
- core/fpu/src/fpnew_pkg.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
- vendor/pulp-platform/fpnew/src/fpnew_pkg.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
# Stand-alone source files
- core/ariane.sv
- core/serdiv.sv
Expand Down Expand Up @@ -68,24 +68,24 @@ sources:
- core/issue_read_operands.sv
- core/pmp/src/pmp_entry.sv
- core/pmp/src/pmp.sv
- core/fpu/src/fpnew_fma.sv
- core/fpu/src/fpnew_opgroup_fmt_slice.sv
- core/fpu/src/fpnew_divsqrt_multi.sv
- core/fpu/src/fpnew_fma_multi.sv
- core/fpu/src/fpnew_opgroup_multifmt_slice.sv
- core/fpu/src/fpnew_classifier.sv
- core/fpu/src/fpnew_noncomp.sv
- core/fpu/src/fpnew_cast_multi.sv
- core/fpu/src/fpnew_opgroup_block.sv
- core/fpu/src/fpnew_rounding.sv
- core/fpu/src/fpnew_top.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
- core/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_mvp_wrapper.sv
- vendor/pulp-platform/fpnew/src/fpnew_fma.sv
- vendor/pulp-platform/fpnew/src/fpnew_opgroup_fmt_slice.sv
- vendor/pulp-platform/fpnew/src/fpnew_divsqrt_multi.sv
- vendor/pulp-platform/fpnew/src/fpnew_fma_multi.sv
- vendor/pulp-platform/fpnew/src/fpnew_opgroup_multifmt_slice.sv
- vendor/pulp-platform/fpnew/src/fpnew_classifier.sv
- vendor/pulp-platform/fpnew/src/fpnew_noncomp.sv
- vendor/pulp-platform/fpnew/src/fpnew_cast_multi.sv
- vendor/pulp-platform/fpnew/src/fpnew_opgroup_block.sv
- vendor/pulp-platform/fpnew/src/fpnew_rounding.sv
- vendor/pulp-platform/fpnew/src/fpnew_top.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
- vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/div_sqrt_mvp_wrapper.sv
- core/frontend/frontend.sv
- core/frontend/instr_scan.sv
- core/frontend/instr_queue.sv
Expand Down Expand Up @@ -143,16 +143,16 @@ sources:
- corev_apu/riscv-dbg/debug_rom/debug_rom.sv
- corev_apu/register_interface/src/apb_to_reg.sv
- corev_apu/axi/src/axi_multicut.sv
- common/submodules/common_cells/src/cf_math_pkg.sv
- common/submodules/common_cells/src/deprecated/generic_fifo.sv
- common/submodules/common_cells/src/deprecated/pulp_sync.sv
- common/submodules/common_cells/src/deprecated/find_first_one.sv
- common/submodules/common_cells/src/rstgen_bypass.sv
- common/submodules/common_cells/src/rstgen.sv
- common/submodules/common_cells/src/stream_mux.sv
- common/submodules/common_cells/src/stream_demux.sv
- common/submodules/common_cells/src/stream_arbiter.sv
- common/submodules/common_cells/src/stream_arbiter_flushable.sv
- vendor/pulp-platform/common_cells/src/cf_math_pkg.sv
- vendor/pulp-platform/common_cells/src/deprecated/generic_fifo.sv
- vendor/pulp-platform/common_cells/src/deprecated/pulp_sync.sv
- vendor/pulp-platform/common_cells/src/deprecated/find_first_one.sv
- vendor/pulp-platform/common_cells/src/rstgen_bypass.sv
- vendor/pulp-platform/common_cells/src/rstgen.sv
- vendor/pulp-platform/common_cells/src/stream_mux.sv
- vendor/pulp-platform/common_cells/src/stream_demux.sv
- vendor/pulp-platform/common_cells/src/stream_arbiter.sv
- vendor/pulp-platform/common_cells/src/stream_arbiter_flushable.sv
- corev_apu/axi/src/axi_cut.sv
- corev_apu/axi/src/axi_join.sv
- corev_apu/axi/src/axi_delayer.sv
Expand All @@ -164,28 +164,28 @@ sources:
- corev_apu/axi/src/axi_demux.sv
- corev_apu/axi/src/axi_xbar.sv
- common/local/techlib/fpga/rtl/SyncSpRamBeNx64.sv
- common/submodules/common_cells/src/sync.sv
- common/submodules/common_cells/src/popcount.sv
- common/submodules/common_cells/src/unread.sv
- common/submodules/common_cells/src/cdc_2phase.sv
- common/submodules/common_cells/src/spill_register_flushable.sv
- common/submodules/common_cells/src/spill_register.sv
- common/submodules/common_cells/src/edge_detect.sv
- common/submodules/common_cells/src/fifo_v3.sv
- common/submodules/common_cells/src/deprecated/fifo_v2.sv
- common/submodules/common_cells/src/deprecated/fifo_v1.sv
- common/submodules/common_cells/src/lzc.sv
- common/submodules/common_cells/src/rr_arb_tree.sv
- common/submodules/common_cells/src/deprecated/rrarbiter.sv
- common/submodules/common_cells/src/stream_delay.sv
- common/submodules/common_cells/src/lfsr.sv
- common/submodules/common_cells/src/lfsr_8bit.sv
- common/submodules/common_cells/src/lfsr_16bit.sv
- common/submodules/common_cells/src/counter.sv
- common/submodules/common_cells/src/shift_reg.sv
- common/submodules/common_cells/src/exp_backoff.sv
- common/submodules/common_cells/src/addr_decode.sv
- common/submodules/common_cells/src/stream_register.sv
- vendor/pulp-platform/common_cells/src/sync.sv
- vendor/pulp-platform/common_cells/src/popcount.sv
- vendor/pulp-platform/common_cells/src/unread.sv
- vendor/pulp-platform/common_cells/src/cdc_2phase.sv
- vendor/pulp-platform/common_cells/src/spill_register_flushable.sv
- vendor/pulp-platform/common_cells/src/spill_register.sv
- vendor/pulp-platform/common_cells/src/edge_detect.sv
- vendor/pulp-platform/common_cells/src/fifo_v3.sv
- vendor/pulp-platform/common_cells/src/deprecated/fifo_v2.sv
- vendor/pulp-platform/common_cells/src/deprecated/fifo_v1.sv
- vendor/pulp-platform/common_cells/src/lzc.sv
- vendor/pulp-platform/common_cells/src/rr_arb_tree.sv
- vendor/pulp-platform/common_cells/src/deprecated/rrarbiter.sv
- vendor/pulp-platform/common_cells/src/stream_delay.sv
- vendor/pulp-platform/common_cells/src/lfsr.sv
- vendor/pulp-platform/common_cells/src/lfsr_8bit.sv
- vendor/pulp-platform/common_cells/src/lfsr_16bit.sv
- vendor/pulp-platform/common_cells/src/counter.sv
- vendor/pulp-platform/common_cells/src/shift_reg.sv
- vendor/pulp-platform/common_cells/src/exp_backoff.sv
- vendor/pulp-platform/common_cells/src/addr_decode.sv
- vendor/pulp-platform/common_cells/src/stream_register.sv
- corev_apu/src/tech_cells_generic/src/cluster_clock_inverter.sv
- corev_apu/src/tech_cells_generic/src/pulp_clock_mux2.sv
- target: not(cv32a6)
Expand Down
76 changes: 38 additions & 38 deletions Flist.ariane
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@
// Author: Michael Schaffner <[email protected]>, ETH Zurich
// Date: 15.08.2018
// Description: File list for OpenPiton flow
+incdir+common/submodules/common_cells/include/
+incdir+vendor/pulp-platform/common_cells/include/
+incdir+common/local/util/
+incdir+corev_apu/register_interface/include/

Expand All @@ -28,27 +28,27 @@ corev_apu/axi/src/axi_pkg.sv
core/include/ariane_axi_pkg.sv
core/include/wt_cache_pkg.sv
core/include/axi_intf.sv
core/fpu/src/fpnew_pkg.sv
vendor/pulp-platform/fpnew/src/fpnew_pkg.sv
core/include/cvxif_pkg.sv
common/submodules/common_cells/src/cf_math_pkg.sv
vendor/pulp-platform/common_cells/src/cf_math_pkg.sv
core/include/instr_tracer_pkg.sv
core/cvxif_example/include/cvxif_instr_pkg.sv
corev_apu/rv_plic/rtl/rv_plic_reg_pkg.sv
common/local/util/sram.sv
common/submodules/common_cells/src/deprecated/rrarbiter.sv
common/submodules/common_cells/src/deprecated/fifo_v1.sv
common/submodules/common_cells/src/deprecated/fifo_v2.sv
common/submodules/common_cells/src/fifo_v3.sv
common/submodules/common_cells/src/shift_reg.sv
common/submodules/common_cells/src/lfsr_8bit.sv
common/submodules/common_cells/src/lfsr.sv
common/submodules/common_cells/src/lzc.sv
common/submodules/common_cells/src/exp_backoff.sv
common/submodules/common_cells/src/rr_arb_tree.sv
common/submodules/common_cells/src/rstgen_bypass.sv
common/submodules/common_cells/src/cdc_2phase.sv
common/submodules/common_cells/src/unread.sv
common/submodules/common_cells/src/popcount.sv
vendor/pulp-platform/common_cells/src/deprecated/rrarbiter.sv
vendor/pulp-platform/common_cells/src/deprecated/fifo_v1.sv
vendor/pulp-platform/common_cells/src/deprecated/fifo_v2.sv
vendor/pulp-platform/common_cells/src/fifo_v3.sv
vendor/pulp-platform/common_cells/src/shift_reg.sv
vendor/pulp-platform/common_cells/src/lfsr_8bit.sv
vendor/pulp-platform/common_cells/src/lfsr.sv
vendor/pulp-platform/common_cells/src/lzc.sv
vendor/pulp-platform/common_cells/src/exp_backoff.sv
vendor/pulp-platform/common_cells/src/rr_arb_tree.sv
vendor/pulp-platform/common_cells/src/rstgen_bypass.sv
vendor/pulp-platform/common_cells/src/cdc_2phase.sv
vendor/pulp-platform/common_cells/src/unread.sv
vendor/pulp-platform/common_cells/src/popcount.sv
corev_apu/axi_mem_if/src/axi2mem.sv
corev_apu/src/tech_cells_generic/src/deprecated/cluster_clk_cells.sv
corev_apu/src/tech_cells_generic/src/deprecated/pulp_clk_cells.sv
Expand Down Expand Up @@ -132,31 +132,31 @@ corev_apu/fpga/src/axi_slice/src/axi_r_buffer.sv
corev_apu/fpga/src/axi_slice/src/axi_aw_buffer.sv
corev_apu/register_interface/src/apb_to_reg.sv
corev_apu/register_interface/src/reg_intf.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_mvp_wrapper.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
core/fpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
core/fpu/src/fpnew_cast_multi.sv
core/fpu/src/fpnew_classifier.sv
core/fpu/src/fpnew_divsqrt_multi.sv
core/fpu/src/fpnew_fma_multi.sv
core/fpu/src/fpnew_fma.sv
core/fpu/src/fpnew_noncomp.sv
core/fpu/src/fpnew_opgroup_block.sv
core/fpu/src/fpnew_opgroup_fmt_slice.sv
core/fpu/src/fpnew_opgroup_multifmt_slice.sv
core/fpu/src/fpnew_rounding.sv
core/fpu/src/fpnew_top.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/div_sqrt_mvp_wrapper.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
vendor/pulp-platform/fpnew/src/fpnew_cast_multi.sv
vendor/pulp-platform/fpnew/src/fpnew_classifier.sv
vendor/pulp-platform/fpnew/src/fpnew_divsqrt_multi.sv
vendor/pulp-platform/fpnew/src/fpnew_fma_multi.sv
vendor/pulp-platform/fpnew/src/fpnew_fma.sv
vendor/pulp-platform/fpnew/src/fpnew_noncomp.sv
vendor/pulp-platform/fpnew/src/fpnew_opgroup_block.sv
vendor/pulp-platform/fpnew/src/fpnew_opgroup_fmt_slice.sv
vendor/pulp-platform/fpnew/src/fpnew_opgroup_multifmt_slice.sv
vendor/pulp-platform/fpnew/src/fpnew_rounding.sv
vendor/pulp-platform/fpnew/src/fpnew_top.sv
core/pmp/src/pmp.sv
core/pmp/src/pmp_entry.sv
common/local/util/instr_tracer.sv
common/local/util/instr_tracer_if.sv
core/cvxif_example/cvxif_example_coprocessor.sv
core/cvxif_example/instr_decoder.sv
common/submodules/common_cells/src/counter.sv
common/submodules/common_cells/src/delta_counter.sv
vendor/pulp-platform/common_cells/src/counter.sv
vendor/pulp-platform/common_cells/src/delta_counter.sv
core/cvxif_fu.sv
36 changes: 18 additions & 18 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -169,13 +169,13 @@ src := core/axi_adapter.sv
corev_apu/riscv-dbg/debug_rom/debug_rom.sv \
corev_apu/register_interface/src/apb_to_reg.sv \
corev_apu/axi/src/axi_multicut.sv \
common/submodules/common_cells/src/rstgen_bypass.sv \
common/submodules/common_cells/src/rstgen.sv \
common/submodules/common_cells/src/stream_mux.sv \
common/submodules/common_cells/src/stream_demux.sv \
common/submodules/common_cells/src/exp_backoff.sv \
common/submodules/common_cells/src/addr_decode.sv \
common/submodules/common_cells/src/stream_register.sv \
vendor/pulp-platform/common_cells/src/rstgen_bypass.sv \
vendor/pulp-platform/common_cells/src/rstgen.sv \
vendor/pulp-platform/common_cells/src/stream_mux.sv \
vendor/pulp-platform/common_cells/src/stream_demux.sv \
vendor/pulp-platform/common_cells/src/exp_backoff.sv \
vendor/pulp-platform/common_cells/src/addr_decode.sv \
vendor/pulp-platform/common_cells/src/stream_register.sv \
corev_apu/axi/src/axi_cut.sv \
corev_apu/axi/src/axi_join.sv \
corev_apu/axi/src/axi_delayer.sv \
Expand All @@ -186,15 +186,15 @@ src := core/axi_adapter.sv
corev_apu/axi/src/axi_mux.sv \
corev_apu/axi/src/axi_demux.sv \
corev_apu/axi/src/axi_xbar.sv \
common/submodules/common_cells/src/cdc_2phase.sv \
common/submodules/common_cells/src/spill_register_flushable.sv \
common/submodules/common_cells/src/spill_register.sv \
common/submodules/common_cells/src/stream_arbiter.sv \
common/submodules/common_cells/src/stream_arbiter_flushable.sv \
common/submodules/common_cells/src/deprecated/fifo_v1.sv \
common/submodules/common_cells/src/deprecated/fifo_v2.sv \
common/submodules/common_cells/src/stream_delay.sv \
common/submodules/common_cells/src/lfsr_16bit.sv \
vendor/pulp-platform/common_cells/src/cdc_2phase.sv \
vendor/pulp-platform/common_cells/src/spill_register_flushable.sv \
vendor/pulp-platform/common_cells/src/spill_register.sv \
vendor/pulp-platform/common_cells/src/stream_arbiter.sv \
vendor/pulp-platform/common_cells/src/stream_arbiter_flushable.sv \
vendor/pulp-platform/common_cells/src/deprecated/fifo_v1.sv \
vendor/pulp-platform/common_cells/src/deprecated/fifo_v2.sv \
vendor/pulp-platform/common_cells/src/stream_delay.sv \
vendor/pulp-platform/common_cells/src/lfsr_16bit.sv \
corev_apu/src/tech_cells_generic/src/deprecated/cluster_clk_cells.sv \
corev_apu/src/tech_cells_generic/src/deprecated/pulp_clk_cells.sv \
corev_apu/src/tech_cells_generic/src/rtl/tc_clk.sv \
Expand Down Expand Up @@ -244,7 +244,7 @@ riscv-fp-tests := $(shell xargs printf '\n%s' < $(riscv-fp-tests-list
riscv-benchmarks := $(shell xargs printf '\n%s' < $(riscv-benchmarks-list) | cut -b 1-)

# Search here for include files (e.g.: non-standalone components)
incdir := common/submodules/common_cells/include/ corev_apu/axi/include/ corev_apu/register_interface/include/
incdir := vendor/pulp-platform/common_cells/include/ corev_apu/axi/include/ corev_apu/register_interface/include/

# Compile and sim flags
compile_flag += +cover=bcfst+/dut -incr -64 -nologo -quiet -suppress 13262 -permissive +define+$(defines)
Expand Down Expand Up @@ -293,7 +293,7 @@ vcs_build: $(dpi-library)/ariane_dpi.so
vlogan $(if $(VERDI), -kdb,) -full64 -nc -sverilog +define+$(defines) -f ../core/Flist.$(target) &&\
vlogan $(if $(VERDI), -kdb,) -full64 -nc -sverilog +define+$(defines) $(filter %.sv,$(ariane_pkg)) +incdir+core/include/+$(VCS_HOME)/etc/uvm-1.2/dpi &&\
vhdlan $(if $(VERDI), -kdb,) -full64 -nc $(filter %.vhd,$(uart_src)) &&\
vlogan $(if $(VERDI), -kdb,) -full64 -nc -sverilog -assert svaext +define+$(defines) $(filter %.sv,$(src)) +incdir+../common/submodules/common_cells/include/+../corev_apu/axi/include/+../corev_apu/register_interface/include/ &&\
vlogan $(if $(VERDI), -kdb,) -full64 -nc -sverilog -assert svaext +define+$(defines) $(filter %.sv,$(src)) +incdir+../vendor/pulp-platform/common_cells/include/+../corev_apu/axi/include/+../corev_apu/register_interface/include/ &&\
vlogan $(if $(VERDI), -kdb,) -full64 -nc -sverilog -ntb_opts uvm-1.2 &&\
vlogan $(if $(VERDI), -kdb,) -full64 -nc -sverilog -ntb_opts uvm-1.2 $(tbs) +define+$(defines) +incdir+../corev_apu/axi/include/ &&\
vcs $(if $(VERDI), -kdb -debug_access+all -lca,) -full64 -timescale=1ns/1ns -ntb_opts uvm-1.2 work.ariane_tb
Expand Down
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