This is a hobby project to attempt to visually identify the various logic gate structures within the MOS 6561 video chip in order to better understand how it works internally. The svg file contains a relative reference to the die shot image (i.e. a microscopic photo of the silicon), but for various reasons (the size of it, and the fact that it is visual6502.org's image), it isn't included in this repo. An svg editor called Inkscape is being used to draw the lines for the various NMOS silicon layers on top of the die shot image (red for polysilicon, green for diffusion, blue for buried contacts, white for metal to diffusion contacts, grey for metal to polysilicon contacts, and pink for labels).
If you are interested in knowing more about how to understand what is seen in the 6561 die shot, take a look here: