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Workng as Hardware R&D Engineer
💭
Workng as Hardware R&D Engineer
19 followers · 98 following
  • Undergraduate Student in TUC

Achievements

Achievement: Arctic Code Vault Contributor

Achievements

Achievement: Arctic Code Vault Contributor

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jason23g/README.md

About me 👋

Hi, I am jason, a graduate of the Electrical and Computer Engineering (ECE) department of Technical University of Crete (TUC). I work as a Hardware R&D engineer in the Computer Architecture and VLSI Systems (CARV) Laboratory of the Institute of Computer Science (ICS), FORTH. My diploma thesis was in hardware security, and my main fields of interest lie in hardware, embedded systems, cybersecurity, and cryptography. In addition, I like participating in various CTF competitions and playing challenges on CTF platforms. Furthermore, I am open to contributing to open-source projects related to FPGAs and embedded systems.

Skills

Software

C Bash Python Java Matlab Octave Cuda

Hardware

Reconfigurable Hardware

Xilinx Vivado IDE Xilinx Vivado HLS Petalinux VHDL Verilog FPGA

Embedded Systems

Raspberry Pi Arduino Microchip AVR 8051 Microcontroller

Networks

Wireshark

Tools

Git Docker Latex

Cybersecurity

CTF Platforms

HackTheBox TryHackMe

Contact

LinkedIn

Stats

GitHub Streak

Pinned Loading

  1. TUC_Compiler TUC_Compiler Public

    This is an implementation of a compiler for the course of Theory of Computation in TUC

    Yacc 2

  2. SC_Processor SC_Processor Public

    An implementation of a single cycle processor based on Instruction Set Architecture (ISA) of MIPS

    VHDL 1

  3. MC_Processor MC_Processor Public

    An implementation of a multicycle processor based on Instruction Set Architecture (ISA) of MIPS

    VHDL 1

  4. Pipeline_Processor Pipeline_Processor Public

    An implementation of a pipeline processor based on Instruction Set Architecture (ISA) of MIPS

    VHDL 1

  5. Tomasulo Tomasulo Public

    VHDL 1

  6. FGPU FGPU Public

    Forked from CEatBTU/FGPU

    FGPU is a soft GPU-like architecture for FPGAs. It is described in VHDL, fully customizable, and can be programmed using OpenCL.

    VHDL 2 1