Test project to host pure hardware (VHDL) IEE1588 Master
Provide a simple, IEEE1588 Master with constant latency timestamp functionality
NMEA Parser
git clone https://github.com/craighaywood/VHDL-NMEA-Parser
1588 Master IP Core
- Please contact
- Numato Saturn (however project can easily be adapted to any FPGA board)
- SIRF based GPS module (although NMEA parser can easily be adapted to other GPS, see NMEA parser project)