ODROID-N2: firmware: reset the DDR configuration

Change-Id: Ib52f1accc13dfa0db9b02a2dfbdab5dceb404efc Signed-off-by: Dongjin Kim <[email protected]>
hardkernel · Feb 17, 2020 · 3b8b5cb · 3b8b5cb
1 parent f16862e
commit 3b8b5cb
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/board/hardkernel/odroidn2/firmware/timing.c b/board/hardkernel/odroidn2/firmware/timing.c
@@ -96,7 +96,7 @@ ddr_set_t __ddr_setting[] = {
 	.dram_cs0_size_MB		= 0xffff,
 	.dram_cs1_size_MB		= 0xffff,
 	.training_SequenceCtrl		= {0x31f,0x61},
-	.phy_odt_config_rank		= {0x30,0x30,0x30,0x30},
+	.phy_odt_config_rank		= {0x23,0x13},
 	.dfi_odt_config			= 0x0808,
 	.PllBypassEn			= 0,
 	.ddr_rdbi_wr_enable		= 0,
@@ -154,7 +154,7 @@ ddr_set_t __ddr_setting[] = {
 	.dram_cs0_size_MB		= 0xffff,
 	.dram_cs1_size_MB		= 0,
 	.training_SequenceCtrl		= {0x31f,0x61},
-	.phy_odt_config_rank		= {0x30,0x30,0x30,0x30},
+	.phy_odt_config_rank		= {0x23,0x13},
 	.dfi_odt_config			= 0x0808,
 	.PllBypassEn			= 0,
 	.ddr_rdbi_wr_enable		= 0,