NVPTX-SPIR-V translator v0.1.0 Release

Highlights

This is the first version of our NVPTX-SPIR-V translator, it can support several features (list below) so that can translate most essentials CUDA kernels to SPIR-V IR.

Support features

• multi-thread and multi-block (23c8df)
• memory hierarchy (698c77)
• synchronization (fa35242)
• atomic(3504a9,af2e17)
• mathematics built-in function (80f33c,7aa7ec,0407a4)

New documents

• tutorial (825012)