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farhanrahman edited this page Aug 10, 2012 · 1 revision

commands required to setup stuff

sudo dpkg-reconfigure dash
sudo ln /usr/bin/make /usr/bin/gmake

Instructions from Xilinx forum

A pal of mine gave me the following brief instructions a few years ago (in the EDK 11.x timeframe) which I still use today with EDK 13.2. Step 1 is stop using EDK. :smileywink: I've added a step 0.

  1. back-up your project.xmp file, it will be clobbered and become unusable with EDK

  2. create new ISE project for your targeted part

  3. Project -> add source; browse to your xps project file and add it

  4. in the hierarchy highlight the newly added xmp project

  5. in the processes (design tab below the hierarchy) double click generate top hdl source

  6. in the hierarchy you should have "my_project"_top and below that should be your xmp project and below that is the .elf file

  7. Project -> add new source and add a new chipscope definition file 6a) Synthesize your source.

  8. add signals to your chipscope file as we always have

Caveats from me:

a. Restore your project.xmp before you go back to EDK or EDK will be very unhappy. b. Regenerate top hdl source if you muck with top level signals (step 4 above) or things will get very wrong and confusing very quickly c. There may be better ways to explore subhierarchies in your EDK project, the above works for me with only minimal pain so I've never tried/studied/explored anything else (I would be happy to hear of anything better, I'm very much a path-of-least-resistance developer when it comes to Xilinx tools).

WARNING: PULLUP configurations on inputs (specified in the EDK UCF file) appear to be tossed during step 2 above. Everything else in the UCF appears to otherwise be correctly handled.

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