soc/cores/cpu/vexiirscv: Add standard variant to allow compilation wi…

…thout specifying --cpu-variant.
enjoy-digital · Sep 19, 2024 · ad2c3fc · ad2c3fc
1 parent 9bacbe1
commit ad2c3fc
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/litex/soc/cores/cpu/vexiiriscv/core.py b/litex/soc/cores/cpu/vexiiriscv/core.py
@@ -25,7 +25,7 @@
 
 # Variants -----------------------------------------------------------------------------------------
 
-CPU_VARIANTS = ["cached", "linux", "debian"]
+CPU_VARIANTS = ["standard", "cached", "linux", "debian"]
 
 # VexiiRiscv -----------------------------------------------------------------------------------------