Arm64/Sve: Add SignExtend* and ZeroExtend* math APIs #101702
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Note regarding the |
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Tagging subscribers to this area: @dotnet/area-system-runtime-intrinsics |
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@dotnet/arm64-contrib |
This was referenced Apr 30, 2024
| @@ -448,14 +448,13 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) | |||
| if (intrin.op3->isContained()) | |||
| { | |||
| assert(intrin.op3->IsVectorZero()); | |||
| if (intrin.op1->isContained()) | |||
| if (intrin.op1->isContained() || intrin.op1->IsMaskAllBitsSet()) | |||
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The intrin.op1->isContained() seems pointless here, no?
We just need to know its not contained for an instruction that actually requires its use (like abs)
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i will have to double check on this one. There was lot of back and forth on this for certain scenarios. I will verify it on next round.
matouskozak
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Apr 30, 2024
* Add [Sign|Zero]Extend[8|16|32] APIs: * Add API to instruction mapping * eliminate extra movprfx for AllBitsSetMask * Add test cases
michaelgsharp
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May 9, 2024
* Add [Sign|Zero]Extend[8|16|32] APIs: * Add API to instruction mapping * eliminate extra movprfx for AllBitsSetMask * Add test cases
Ruihan-Yin
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May 30, 2024
* Add [Sign|Zero]Extend[8|16|32] APIs: * Add API to instruction mapping * eliminate extra movprfx for AllBitsSetMask * Add test cases
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All tests passing: https://gist.github.com/kunalspathak/d8c244f02f51e1a9e247f97f9d23b9e3
Contributes to #99957