disable SWD on F103

issue #9

CONFIG.md

@@ -40,6 +40,8 @@ You can find configuration parameters in the following tables. Defaults marked *
 |DFU_BOOTSTRAP_LEVEL | Level on bootstrap pin to activate  | **_LOW**/_HIGH                 |                         |
 |DFU_BOOTSTRAP_PULL  | Bootstrap pin pullup control        | _DISABLE/**_AUTO**/_LOW/_HIGH  |                         |
 |DFU_DBLRESET_MS     | Doublereset activation time (ms)    | TIMEOUT/_DISABLE               | **300**                 |
+|DFU_SEAL_LEVEL      | RDP level                           | **0**, 1, 2 (if available)     |                         |
+|DFU_DISABLE_SWD     | Disable SWD/JTAG on strart          | _ENABLE/**_DISABLE**           |                         |
 |DFU_APP_START       | Start address for user code         | ROM ADDRESS/**_AUTO**          | must be page aligned    |
 |DFU_APP_SIZE        | User application max size           | AMMOUNT/**_AUTO**              | up to the ROM end       |
 |DFU_CIPHER          | Type of ciper                       | See Table 3                    | **DFU_CIPHER_RC5**      |

config.h

@@ -86,6 +86,10 @@
 #ifndef DFU_SEAL_LEVEL
 #define DFU_SEAL_LEVEL      0
 #endif
+/** Disable SWD/JTAG interface **/
+#ifndef DFU_DISABLE_SWD
+#define DFU_DISABLE_SWD     _DISABLE
+#endif
 /* USB VID */
 #ifndef DFU_VENDOR_ID
 #define DFU_VENDOR_ID       0x0483

mcu/stm32f103.S

@@ -21,6 +21,8 @@
 #define RCC_APB2RSTR    0x0C
 #define RCC_APB2ENR     0x18
 
+#define AFIO_BASE       0x40010000
+
 #define GPIOA           0x40010800
 #define GPIOB           0x40010C00
 #define GPIOC           0x40011000
@@ -113,8 +115,13 @@ Reset_Handler:
 /* pulling down GPIOA12 (USB-DP)*/
 /* this will force re-enumeration. Very useful if no DP control pin used */
     ldr     r0, =#RCC_BASE
-    movs    r2, #(0x04 | BOOTSTRAP_RCC)
+    movs    r2, #(0x05 | BOOTSTRAP_RCC)
     strb    r2, [r0, #RCC_APB2ENR]
+#if (DFU_DISABLE_SWD == _ENABLE)
+    ldr     r1, =#AFIO_BASE
+    ldr     r3, =#0x04000000
+    str     r3, [r1, #0x04]
+#endif
     ldr     r1, =#GPIOA
     ldr     r2, [r1, #GPIO_CRH]
     ldr     r3, =#0x000F0000