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Merge pull request #535 from diffblue/sva-if
SVA if expressions
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,11 @@ | ||
CORE broken-smt-backend | ||
if1.sv | ||
--bound 2 | ||
^\[main\.property\.p0\] always if\(main\.counter == 0\) nexttime main\.counter == 1: PROVED up to bound 2$ | ||
^\[main\.property\.p1\] always if\(main\.counter == 0\) nexttime main\.counter == 1 else nexttime main\.counter == 3: REFUTED$ | ||
^EXIT=10$ | ||
^SIGNAL=0$ | ||
-- | ||
^warning: ignoring | ||
-- | ||
SMT-back end doesn't do cast from bool to bool. |
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module main(input clk); | ||
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// count up from 0 to 10 | ||
reg [7:0] counter; | ||
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initial counter = 0; | ||
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always @(posedge clk) | ||
counter = counter + 1; | ||
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// expected to pass | ||
p0: assert property (if(counter == 0) nexttime counter == 1); | ||
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// expected to fail | ||
p1: assert property (if(counter == 0) nexttime counter == 1 else nexttime counter == 3); | ||
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endmodule |
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Original file line number | Diff line number | Diff line change |
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@@ -20,6 +20,7 @@ Author: Daniel Kroening, [email protected] | |
/// sva_non_overlapped_implication --> ¬a ∨ Xb | ||
/// sva_nexttime φ --> Xφ | ||
/// sva_s_nexttime φ --> Xφ | ||
/// sva_if --> ? : | ||
/// ¬Xφ --> X¬φ | ||
/// ¬¬φ --> φ | ||
/// ¬Gφ --> F¬φ | ||
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Original file line number | Diff line number | Diff line change |
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@@ -12,6 +12,7 @@ Author: Daniel Kroening, [email protected] | |
#include <util/bitvector_expr.h> | ||
#include <util/std_expr.h> | ||
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class sva_if_exprt; | ||
class sva_ranged_predicate_exprt; | ||
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class expr2verilogt | ||
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@@ -107,6 +108,8 @@ class expr2verilogt | |
virtual std::string | ||
convert_sva_cycle_delay(const ternary_exprt &, unsigned precedence); | ||
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std::string convert_sva_if(const sva_if_exprt &); | ||
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virtual std::string | ||
convert_sva_sequence_concatenation(const binary_exprt &, unsigned precedence); | ||
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