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Verilog: stick statement label onto `assert`/`assume`/`cover` #1801

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Triggered via pull request June 8, 2024 22:51

kroening

opened #534

assertion-statement-label

Status Success

Total duration 6m 29s

Artifacts –

pull-request-checks.yaml

on: pull_request

check-ubuntu-20_04-make-gcc

check-ubuntu-20_04-make-clang

check-macos-12-make-clang