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Syntactic checks

Verilog: use enum names when pretty-printing enum constants #438

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Verilog: use enum names when pretty-printing enum constants

Verilog: use enum names when pretty-printing enum constants #438

Triggered via pull request February 21, 2024 19:00
@kroeningkroening
synchronize #377
verilog-use-enum-names
Status Success
Total duration 1m 9s
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syntax-checks.yaml

on: pull_request
check-clang-format
1m 1s
check-clang-format
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