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Verilog: add KNOWNBUG test for enums in module hierarchy #1220

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Verilog: add KNOWNBUG test for enums in module hierarchy

Verilog: add KNOWNBUG test for enums in module hierarchy #1220

Triggered via pull request February 20, 2024 15:57
@kroeningkroening
opened #375
enum_with_hierarchy1
Status Success
Total duration 1m 32s
Artifacts –

pull-request-checks.yaml

on: pull_request
check-ubuntu-20_04-make-gcc
1m 17s
check-ubuntu-20_04-make-gcc
check-ubuntu-20_04-make-clang
1m 23s
check-ubuntu-20_04-make-clang
CentOS 8
53s
CentOS 8
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