Releases: dhammikamare/arm-sim
arm-sim-beta
A Web based ARM Instruction Set Simulator
ITERATION 1: CORE REQUIREMENT
This simulator is able to perform the following actions:
- provide an online editor to type ARM assembly program(with syntax highlighting, etc.)
- provide an option to load an ARM assembly file to the editor
- upload the file to the web server
- compile the assembly file in the web server
-
run/simulate the binary file (that was produced in the compilation in the last step) - produce the output of the simulation in the website
ITERATION 2: ENHANCEMENTS
This web based simulator can display the internal state of the processor in the website. In addition to the actions featured in Iteration 1, iteration 2 allow the following actions:
- allow users to simulate their assembly program, either step by step or in a single go
- allow users to visualize the internal state of a processor including
registers (user registers and special registers such as IR, PC)
instruction memory
data memory (segments such as stack, heap, and data)
a count of the number of instructions executed
- allow users to toggle between different representations (such as binary/decimal/hex) of the register/memory values
- allow users to clear/reinitialize registers and memories
- allow users to set values to registers
arm-sim-alpha
A Web based ARM Instruction Set Simulator
ITERATION 1: CORE REQUIREMENT
This simulator is able to perform the following actions:
• provide an online editor to type ARM assembly program(with syntax highlighting, etc.)
• provide an option to load an ARM assembly file to the editor
• upload the file to the web server
• compile the assembly file in the web server
• run/simulate the binary file (that was produced in the compilation in the last step)
• produce the output of the simulation in the website