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(kernel-rolling) arch: Add basic platform support for Phytium FTC #175

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(kernel-rolling) arch: Add basic platform support for Phytium FTC #175

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f8b4836
arm64: Add MIDR encoding for Phytium CPUs
JiakunShuai May 9, 2024
ef57517
arm64: kpti: Add Phytium FTC3xx/6xx CPU cores to kpti safelist
chenbaozi-ft Jul 14, 2023
c6b2019
arm64: proton-pack: Add Phytium FTC310 CPU core to spectre-v2/v4 safe…
chenbaozi-ft Jul 14, 2023
16eacaf
dt-bindings: arm: Document Phytium FTC series cpu
chenbaozi-ft Jul 14, 2023
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6 changes: 6 additions & 0 deletions Documentation/devicetree/bindings/arm/cpus.yaml
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Expand Up @@ -182,6 +182,12 @@ properties:
- nvidia,tegra132-denver
- nvidia,tegra186-denver
- nvidia,tegra194-carmel
- phytium,ftc310
- phytium,ftc660
- phytium,ftc661
- phytium,ftc662
- phytium,ftc663
- phytium,ftc664
- qcom,krait
- qcom,kryo
- qcom,kryo240
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14 changes: 14 additions & 0 deletions arch/arm64/include/asm/cputype.h
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Expand Up @@ -61,6 +61,7 @@
#define ARM_CPU_IMP_HISI 0x48
#define ARM_CPU_IMP_APPLE 0x61
#define ARM_CPU_IMP_AMPERE 0xC0
#define ARM_CPU_IMP_PHYTIUM 0x70
#define ARM_CPU_IMP_MICROSOFT 0x6D

#define ARM_CPU_PART_AEM_V8 0xD0F
Expand Down Expand Up @@ -138,6 +139,13 @@

#define MICROSOFT_CPU_PART_AZURE_COBALT_100 0xD49 /* Based on r0p0 of ARM Neoverse N2 */

#define PHYTIUM_CPU_PART_FTC310 0x660
#define PHYTIUM_CPU_PART_FTC660 0x660
#define PHYTIUM_CPU_PART_FTC661 0x661
#define PHYTIUM_CPU_PART_FTC662 0x662
#define PHYTIUM_CPU_PART_FTC663 0x663
#define PHYTIUM_CPU_PART_FTC664 0x664

#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72)
Expand Down Expand Up @@ -196,6 +204,12 @@
#define MIDR_APPLE_M2_BLIZZARD_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)
#define MIDR_APPLE_M2_AVALANCHE_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX)
#define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1)
#define MIDR_PHYTIUM_FTC310 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC310)
#define MIDR_PHYTIUM_FTC660 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC660)
#define MIDR_PHYTIUM_FTC661 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC661)
#define MIDR_PHYTIUM_PS17064 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC662)
#define MIDR_PHYTIUM_FTC663 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC663)
#define MIDR_PHYTIUM_FTC664 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC664)
#define MIDR_MICROSOFT_AZURE_COBALT_100 MIDR_CPU_MODEL(ARM_CPU_IMP_MICROSOFT, MICROSOFT_CPU_PART_AZURE_COBALT_100)

/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
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6 changes: 6 additions & 0 deletions arch/arm64/kernel/cpufeature.c
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Expand Up @@ -1679,6 +1679,12 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_FTC310),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_FTC660),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_FTC661),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_PS17064),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_FTC663),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_FTC664),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_GOLD),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
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2 changes: 2 additions & 0 deletions arch/arm64/kernel/proton-pack.c
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Expand Up @@ -160,6 +160,7 @@ static enum mitigation_state spectre_v2_get_cpu_hw_mitigation_state(void)
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_FTC310),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
Expand Down Expand Up @@ -470,6 +471,7 @@ static enum mitigation_state spectre_v4_get_cpu_hw_mitigation_state(void)
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
MIDR_ALL_VERSIONS(MIDR_PHYTIUM_FTC310),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{ /* sentinel */ },
Expand Down