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mtd: rawnand: Add Phytium NAND flash controller support
This patch implements a device driver of NAND flash controller for both Phytium PCIe chipset and SoCs. Since interrupt flags depends on the bus implementation, e.g., PCI vs platform, we extract the interrupt register function from NFC driver core. Signed-off-by: Zhu Mingshuai <[email protected]> Signed-off-by: Zhou Yulin <[email protected]> Signed-off-by: Chen Baozi <[email protected]> Signed-off-by: Wang Yinfeng <[email protected]> Signed-off-by: Hu Yeqing <[email protected]>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/mtd/phytium,nfc.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Phytium Nand Flash controller | ||
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maintainers: | ||
- Chen Baozi <[email protected]> | ||
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properties: | ||
compatible: | ||
const: phytium,nfc | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
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nand-ecc-strength: | ||
const: 8 | ||
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nand-ecc-step-size: | ||
const: 512 | ||
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allOf: | ||
- $ref: "nand-controller.yaml#" | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
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examples: | ||
- | | ||
nand0: nand@28002000 { | ||
compatible = "phytium,nfc"; | ||
reg = <0x0 0x28002000 0x0 0x1000>; | ||
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; | ||
}; |
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