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Merge tag 'devicetree-for-6.13' of git://git.kernel.org/pub/scm/linux…
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…/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - Enable dtc "interrupt_provider" warnings for binding examples. Fix
     the warnings in fsl,mu-msi and ti,sci-inta due to this.

   - Convert zii,rave-sp-wdt, zii,rave-sp-pwrbutton, and
     altr,fpga-passive-serial to DT schema format

   - Add some documentation on the different forms of YAML text blocks
     which are a constant source of review comments

   - Fix some schema errors in constraints for arrays

   - Add compatibles for qcom,sar2130p-pdc and onnn,adt7462

  DT core:

   - Allow overlay kunit tests to run CONFIG_OF_OVERLAY=n

   - Add some warnings on deprecated address handling

   - Rework early_init_dt_scan() so the arch can pass in the phys
     address of the DTB as __pa() is not always valid to use. This fixes
     a warning for arm64 with kexec.

   - Add and use some new DT graph iterators for iterating over ports
     and endpoints

   - Rework reserved-memory handling to be sized dynamically for fixed
     regions

   - Optimize of_modalias() to avoid a strlen() call

   - Constify struct device_node and property pointers where ever
     possible"

* tag 'devicetree-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (36 commits)
  of: Allow overlay kunit tests to run CONFIG_OF_OVERLAY=n
  dt-bindings: interrupt-controller: qcom,pdc: Add SAR2130P compatible
  of/address: Rework bus matching to avoid warnings
  of: WARN on deprecated #address-cells/#size-cells handling
  of/fdt: Don't use default address cell sizes for address translation
  dt-bindings: Enable dtc "interrupt_provider" warnings
  of/fdt: add dt_phys arg to early_init_dt_scan and early_init_dt_verify
  dt-bindings: cache: qcom,llcc: Fix X1E80100 reg entries
  dt-bindings: watchdog: convert zii,rave-sp-wdt.txt to yaml format
  dt-bindings: input: convert zii,rave-sp-pwrbutton.txt to yaml
  media: xilinx-tpg: use new of_graph functions
  fbdev: omapfb: use new of_graph functions
  gpu: drm: omapdrm: use new of_graph functions
  ASoC: audio-graph-card2: use new of_graph functions
  ASoC: audio-graph-card: use new of_graph functions
  ASoC: test-component: use new of_graph functions
  of: property: use new of_graph functions
  of: property: add of_graph_get_next_port_endpoint()
  of: property: add of_graph_get_next_port()
  of: module: remove strlen() call in of_modalias()
  ...
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torvalds committed Nov 20, 2024
2 parents 80db457 + 28b513b commit e6de688
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1 change: 0 additions & 1 deletion Documentation/devicetree/bindings/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,6 @@ DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_all_cmd)))
override DTC_FLAGS := \
-Wno-avoid_unnecessary_addr_size \
-Wno-graph_child_address \
-Wno-interrupt_provider \
-Wno-unique_unit_address \
-Wunique_unit_address_if_enabled

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5 changes: 2 additions & 3 deletions Documentation/devicetree/bindings/cache/l2c2x0.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -100,9 +100,8 @@ properties:
filter. Addresses in the filter window are directed to the M1 port. Other
addresses will go to the M0 port.
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
minItems: 2
maxItems: 2
minItems: 2
maxItems: 2

arm,io-coherent:
description: indicates that the system is operating in an hardware
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36 changes: 34 additions & 2 deletions Documentation/devicetree/bindings/cache/qcom,llcc.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -39,11 +39,11 @@ properties:

reg:
minItems: 2
maxItems: 9
maxItems: 10

reg-names:
minItems: 2
maxItems: 9
maxItems: 10

interrupts:
maxItems: 1
Expand Down Expand Up @@ -134,6 +134,36 @@ allOf:
- qcom,qdu1000-llcc
- qcom,sc8180x-llcc
- qcom,sc8280xp-llcc
then:
properties:
reg:
items:
- description: LLCC0 base register region
- description: LLCC1 base register region
- description: LLCC2 base register region
- description: LLCC3 base register region
- description: LLCC4 base register region
- description: LLCC5 base register region
- description: LLCC6 base register region
- description: LLCC7 base register region
- description: LLCC broadcast base register region
reg-names:
items:
- const: llcc0_base
- const: llcc1_base
- const: llcc2_base
- const: llcc3_base
- const: llcc4_base
- const: llcc5_base
- const: llcc6_base
- const: llcc7_base
- const: llcc_broadcast_base

- if:
properties:
compatible:
contains:
enum:
- qcom,x1e80100-llcc
then:
properties:
Expand All @@ -148,6 +178,7 @@ allOf:
- description: LLCC6 base register region
- description: LLCC7 base register region
- description: LLCC broadcast base register region
- description: LLCC broadcast AND register region
reg-names:
items:
- const: llcc0_base
Expand All @@ -159,6 +190,7 @@ allOf:
- const: llcc6_base
- const: llcc7_base
- const: llcc_broadcast_base
- const: llcc_broadcast_and_base

- if:
properties:
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7 changes: 3 additions & 4 deletions Documentation/devicetree/bindings/dma/dma-common.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,9 @@ properties:
The first item in the array is for channels 0-31, the second is for
channels 32-63, etc.
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
minItems: 1
# Should be enough
maxItems: 255
minItems: 1
# Should be enough
maxItems: 255

dma-channels:
$ref: /schemas/types.yaml#/definitions/uint32
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1 change: 1 addition & 0 deletions Documentation/devicetree/bindings/example-schema.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -262,4 +262,5 @@ examples:
reg-names = "core", "aux";
interrupts = <10>;
interrupt-controller;
#interrupt-cells = <2>;
};
29 changes: 0 additions & 29 deletions Documentation/devicetree/bindings/fpga/altera-passive-serial.txt

This file was deleted.

Original file line number Diff line number Diff line change
@@ -0,0 +1,74 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/altr,fpga-passive-serial.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Altera Passive Serial SPI FPGA Manager

maintainers:
- Fabio Estevam <[email protected]>

description: |
Altera FPGAs support a method of loading the bitstream over what is
referred to as "passive serial".
The passive serial link is not technically SPI, and might require extra
circuits in order to play nicely with other SPI slaves on the same bus.
See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
compatible:
enum:
- altr,fpga-passive-serial
- altr,fpga-arria10-passive-serial

spi-max-frequency:
maximum: 20000000

reg:
maxItems: 1

nconfig-gpios:
description:
Config pin (referred to as nCONFIG in the manual).
maxItems: 1

nstat-gpios:
description:
Status pin (referred to as nSTATUS in the manual).
maxItems: 1

confd-gpios:
description:
confd pin (referred to as CONF_DONE in the manual)
maxItems: 1

required:
- compatible
- reg
- nconfig-gpios
- nstat-gpios

additionalProperties: false

examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
fpga@0 {
compatible = "altr,fpga-passive-serial";
reg = <0>;
nconfig-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
nstat-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
confd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
};
};
...
22 changes: 0 additions & 22 deletions Documentation/devicetree/bindings/input/zii,rave-sp-pwrbutton.txt

This file was deleted.

36 changes: 36 additions & 0 deletions Documentation/devicetree/bindings/input/zii,rave-sp-pwrbutton.yaml
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@@ -0,0 +1,36 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/zii,rave-sp-pwrbutton.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Zodiac Inflight Innovations RAVE Supervisory Processor Power Button

maintainers:
- Frank Li <[email protected]>

description:
RAVE SP input device is a "MFD cell" device corresponding to power
button functionality of RAVE Supervisory Processor. It is expected
that its Device Tree node is specified as a child of the node
corresponding to the parent RAVE SP device (as documented in
Documentation/devicetree/bindings/mfd/zii,rave-sp.yaml)

properties:
compatible:
const: zii,rave-sp-pwrbutton

required:
- compatible

allOf:
- $ref: input.yaml

unevaluatedProperties: false

examples:
- |
pwrbutton {
compatible = "zii,rave-sp-pwrbutton";
};
Original file line number Diff line number Diff line change
Expand Up @@ -132,10 +132,9 @@ properties:
Address property. Base address of an alias of the GICD region containing
only the {SET,CLR}SPI registers to be used if isolation is required,
and if supported by the HW.
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
minItems: 1
maxItems: 2
oneOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- $ref: /schemas/types.yaml#/definitions/uint64

ppi-partitions:
type: object
Expand Down Expand Up @@ -223,9 +222,8 @@ patternProperties:
(u32, u32) tuple describing the untranslated
address and size of the pre-ITS window.
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
minItems: 2
maxItems: 2
minItems: 2
maxItems: 2

required:
- compatible
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -62,8 +62,6 @@ properties:
- const: processor-a-side
- const: processor-b-side

interrupt-controller: true

msi-controller: true

"#msi-cells":
Expand All @@ -73,7 +71,6 @@ required:
- compatible
- reg
- interrupts
- interrupt-controller
- msi-controller
- "#msi-cells"

Expand All @@ -88,7 +85,6 @@ examples:
compatible = "fsl,imx6sx-mu-msi";
msi-controller;
#msi-cells = <0>;
interrupt-controller;
reg = <0x5d270000 0x10000>, /* A side */
<0x5d300000 0x10000>; /* B side */
reg-names = "processor-a-side", "processor-b-side";
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Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@ properties:
- qcom,qdu1000-pdc
- qcom,sa8255p-pdc
- qcom,sa8775p-pdc
- qcom,sar2130p-pdc
- qcom,sc7180-pdc
- qcom,sc7280-pdc
- qcom,sc8180x-pdc
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -109,6 +109,7 @@ examples:
compatible = "ti,sci-inta";
reg = <0x0 0x33d00000 0x0 0x100000>;
interrupt-controller;
#interrupt-cells = <0>;
msi-controller;
interrupt-parent = <&main_navss_intr>;
ti,sci = <&dmsc>;
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Original file line number Diff line number Diff line change
Expand Up @@ -135,8 +135,7 @@ properties:

data-lanes:
$ref: /schemas/media/video-interfaces.yaml#/properties/data-lanes
items:
maxItems: 4
maxItems: 4
description:
This property is for lane reordering between the THP7312 and the imaging
sensor that it is connected to.
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Original file line number Diff line number Diff line change
Expand Up @@ -66,9 +66,8 @@ patternProperties:

samsung,srom-timing:
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
minItems: 6
maxItems: 6
minItems: 6
maxItems: 6
description: |
Array of 6 integers, specifying bank timings in the following order:
Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
Expand Down
5 changes: 2 additions & 3 deletions Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -92,9 +92,8 @@ properties:
may have two component regions -- base and extended -- so
this information cannot be deduced from the dma-ranges.
$ref: /schemas/types.yaml#/definitions/uint64-array
items:
minItems: 1
maxItems: 3
minItems: 1
maxItems: 3

resets:
minItems: 1
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3 changes: 1 addition & 2 deletions Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -55,8 +55,7 @@ properties:

qcom,smem:
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
maxItems: 2
maxItems: 2
description:
Two identifiers of the inbound and outbound smem items used for this edge.

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2 changes: 2 additions & 0 deletions Documentation/devicetree/bindings/trivial-devices.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -297,6 +297,8 @@ properties:
- nuvoton,w83773g
# OKI ML86V7667 video decoder
- oki,ml86v7667
# ON Semiconductor ADT7462 Temperature, Voltage Monitor and Fan Controller
- onnn,adt7462
# 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
- plx,pex8648
# Pulsedlight LIDAR range-finding sensor
Expand Down
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