Skip to content

Commit

Permalink
Merge pull request #777 from hzeller/run-buildifier
Browse files Browse the repository at this point in the history
Run buildifier on all BUILD and bzl files.
  • Loading branch information
hzeller authored Apr 21, 2021
2 parents b774da0 + 2776146 commit ed89c1b
Show file tree
Hide file tree
Showing 6 changed files with 27 additions and 28 deletions.
2 changes: 1 addition & 1 deletion BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -21,12 +21,12 @@ installer(
"//verilog/tools/formatter:git-verilog-format",
"//verilog/tools/formatter:verible-verilog-format",
"//verilog/tools/formatter:verible-verilog-format-changed-lines-interactive",
"//verilog/tools/kythe:verible-verilog-kythe-extractor",
"//verilog/tools/lint:verible-verilog-lint",
"//verilog/tools/obfuscator:verible-verilog-obfuscate",
"//verilog/tools/preprocessor:verible-verilog-preprocessor",
"//verilog/tools/project:verible-verilog-project",
"//verilog/tools/syntax:verible-verilog-syntax",
"//verilog/tools/kythe:verible-verilog-kythe-extractor",
],
)

Expand Down
1 change: 0 additions & 1 deletion common/text/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,6 @@ cc_library(
],
)


cc_library(
name = "token_info_test_util",
testonly = 1,
Expand Down
2 changes: 1 addition & 1 deletion third_party/py/dataclasses/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,6 @@ filegroup(
py_library(
name = "dataclasses",
srcs = glob(["**/*.py"]),
srcs_version = "PY3", # Only works with Python 3.
imports = ["."],
srcs_version = "PY3", # Only works with Python 3.
)
6 changes: 3 additions & 3 deletions verilog/analysis/checkers/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -36,8 +36,8 @@ cc_library(
":generate_label_prefix_rule",
":generate_label_rule",
":interface_name_style_rule",
":legacy_genvar_declaration_rule",
":legacy_generate_region_rule",
":legacy_genvar_declaration_rule",
":line_length_rule",
":macro_name_style_rule",
":macro_string_concatenation_rule",
Expand All @@ -60,8 +60,8 @@ cc_library(
":proper_parameter_declaration_rule",
":signal_name_style_rule",
":struct_union_name_style_rule",
":token_stream_lint_rule",
":suggest_parentheses_rule",
":token_stream_lint_rule",
":undersized_binary_literal_rule",
":unpacked_dimensions_rule",
":uvm_macro_semicolon_rule",
Expand Down Expand Up @@ -1900,8 +1900,8 @@ cc_test(
"//verilog/CST:verilog_nonterminals",
"//verilog/analysis:verilog_analyzer",
"//verilog/parser:verilog_token_enum",
"@com_google_googletest//:gtest_main",
"@com_google_absl//absl/strings",
"@com_google_googletest//:gtest_main",
],
)

Expand Down
4 changes: 2 additions & 2 deletions verilog/tools/syntax/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -18,10 +18,10 @@ cc_binary(
"//common/util:file_util",
"//common/util:init_command_line",
"//common/util:logging",
"//verilog/CST:verilog_tree_print",
"//verilog/CST:verilog_tree_json",
"//verilog/analysis:verilog_analyzer",
"//verilog/CST:verilog_tree_print",
"//verilog/analysis:json_diagnostics",
"//verilog/analysis:verilog_analyzer",
"//verilog/analysis/checkers:verilog_lint_rules",
"//verilog/parser:verilog_parser",
"//verilog/parser:verilog_token",
Expand Down
40 changes: 20 additions & 20 deletions verilog/tools/syntax/export_json_examples/BUILD
Original file line number Diff line number Diff line change
@@ -1,55 +1,55 @@
load("@rules_python//python:defs.bzl", "py_test", "py_library", "py_binary")
load("@rules_python//python:defs.bzl", "py_binary", "py_library", "py_test")

licenses(["notice"])

py_library(
name = "verible_verilog_syntax_py",
srcs = ["verible_verilog_syntax.py"],
srcs_version = "PY3",
imports = ["."],
data = ["//verilog/tools/syntax:verible-verilog-syntax"],
imports = ["."],
srcs_version = "PY3",
deps = [
"@python_anytree//:anytree",
"//third_party/py/dataclasses",
"@python_anytree//:anytree",
],
)

py_test(
name = "verible_verilog_syntax_py_test",
size = "small",
srcs = ["verible_verilog_syntax_test.py"],
srcs_version = "PY3",
python_version = "PY3",
args = ["$(location //verilog/tools/syntax:verible-verilog-syntax)"],
data = ["//verilog/tools/syntax:verible-verilog-syntax"],
main = "verible_verilog_syntax_test.py",
python_version = "PY3",
srcs_version = "PY3",
deps = [":verible_verilog_syntax_py"],
data = ["//verilog/tools/syntax:verible-verilog-syntax"],
args = ["$(location //verilog/tools/syntax:verible-verilog-syntax)"],
)

py_binary(
name = "print_modules",
srcs = ["print_modules.py"],
srcs_version = "PY3",
python_version = "PY3",
args = ["$(location //verilog/tools/syntax:verible-verilog-syntax)"],
data = ["//verilog/tools/syntax:verible-verilog-syntax"],
main = "print_modules.py",
python_version = "PY3",
srcs_version = "PY3",
deps = [
":verible_verilog_syntax_py",
"@python_anytree//:anytree",
":verible_verilog_syntax_py",
"@python_anytree//:anytree",
],
data = ["//verilog/tools/syntax:verible-verilog-syntax"],
args = ["$(location //verilog/tools/syntax:verible-verilog-syntax)"],
)

py_binary(
name = "print_tree",
srcs = ["print_tree.py"],
srcs_version = "PY3",
python_version = "PY3",
args = ["$(location //verilog/tools/syntax:verible-verilog-syntax)"],
data = ["//verilog/tools/syntax:verible-verilog-syntax"],
main = "print_tree.py",
python_version = "PY3",
srcs_version = "PY3",
deps = [
":verible_verilog_syntax_py",
"@python_anytree//:anytree",
":verible_verilog_syntax_py",
"@python_anytree//:anytree",
],
data = ["//verilog/tools/syntax:verible-verilog-syntax"],
args = ["$(location //verilog/tools/syntax:verible-verilog-syntax)"],
)

0 comments on commit ed89c1b

Please sign in to comment.