Fix to make 'infinite' usable as symbol.

Fixes #399 Signed-off-by: Henner Zeller <[email protected]>
chipsalliance · Mar 1, 2022 · 3df8b0c · 3df8b0c
1 parent ec587c6
commit 3df8b0c
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diff --git a/verilog/parser/verilog.y b/verilog/parser/verilog.y
@@ -802,6 +802,8 @@ KeywordIdentifier
   /* TK_sample is in SystemVerilog coverage_event */
   | TK_sample
     { $$ = move($1); }
+  | TK_infinite
+    { $$ = move($1); }
   ;
 
 /* TODO(fangism): phase this out:

diff --git a/verilog/parser/verilog_parser_unittest.cc b/verilog/parser/verilog_parser_unittest.cc
@@ -1799,6 +1799,7 @@ static const ParserTestCaseArray kModuleTests = {
     "module m(wire p_pkg::foo_t foo); endmodule\n",
     "module m; wire p_pkg::foo_t [2:0] foo [0:1]; endmodule\n",
     "module m(wire p_pkg::foo_t [2:0] foo [0:2]); endmodule\n",
+    "module m; wire infinite; endmodule\n",  // infinite also a keyword
     "interface _if; wire p_pkg::foo_t foo; endinterface\n",
     "interface _if; wire p_pkg::foo_t [1:0] foo [0:1]; endinterface\n",
     // system task calls

diff --git a/verilog/parser/verilog_token_classifications.cc b/verilog/parser/verilog_token_classifications.cc
@@ -168,6 +168,7 @@ bool IsIdentifierLike(verilog_tokentype token_type) {
     case verilog_tokentype::TK_from:
     case verilog_tokentype::TK_discrete:
     case verilog_tokentype::TK_sample:
+    case verilog_tokentype::TK_infinite:
       return true;
     default:
       break;