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Prefix all project sources with verible.
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Everything toplevel common/ and verilog/ is now
named verible/common/ and verible/verilog.

This make it easier to distinguish project-specific
files.

Since file is renamed, use `git log --follow` to get
more history.
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hzeller committed Nov 23, 2024
1 parent 6acd488 commit 247a264
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12 changes: 6 additions & 6 deletions .github/bin/check-potential-problems.sh
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ EXIT_CODE=0
#
# So, until these assumptions are fixed, we need to use absl::string_view that
# comes with the same implementation everywhere.
find common verilog -name "*.h" -o -name "*.cc" | \
find verible -name "*.h" -o -name "*.cc" | \
xargs grep -n "std::string_view"
if [ $? -eq 0 ]; then
echo "::error:: use absl::string_view instead of std::string_view"
Expand All @@ -44,7 +44,7 @@ fi
# is a good idea to move an implementation to a *.cc file anyway)
#
# TODO(hzeller): Arguably this might be good for common/util/logging.h as well.
find . -name "*.h" | xargs grep -n '#include "common/util/status_macros.h"'
find . -name "*.h" | xargs grep -n '#include "verible/common/util/status_macros.h"'
if [ $? -eq 0 ]; then
echo "::error:: using status_macros.h in a header pollutes global namespace."
echo
Expand All @@ -54,7 +54,7 @@ fi
# Don't accidentally use anything from the verilog namespace in the common
# verible namespace to make sure common stays independent.
# Use of that namespace in a comment is ok, or if waived with // NOLINT
find common -name "*.h" -o -name "*.cc" | xargs grep "verilog::" \
find verible/common -name "*.h" -o -name "*.cc" | xargs grep "verilog::" \
| egrep -v "(//.*verilog::|// NOLINT)"
if [ $? -eq 0 ]; then
echo "::error:: use of the verilog::-namespace inside common/"
Expand All @@ -63,15 +63,15 @@ if [ $? -eq 0 ]; then
fi

# Always use fully qualified include paths.
find common verilog -name "*.h" -o -name "*.cc" | \
find verible -name "*.h" -o -name "*.cc" | \
xargs egrep -n '#include "[^/]*"'
if [ $? -eq 0 ]; then
echo "::error:: always use a fully qualified name for #includes"
echo
EXIT_CODE=1
fi

find common verilog -name "*.h" -o -name "*.cc" | grep _ | grep -v _test
find verible -name "*.h" -o -name "*.cc" | grep _ | grep -v _test
if [ $? -eq 0 ]; then
echo "::error:: File naming-convention for c++ files is to use dashes as separator with underscore only in test files; e.g. foo-bar_test.cc"
echo
Expand All @@ -91,7 +91,7 @@ if [ $? -eq 0 ]; then
fi

# Never use std::regex.
find common verilog -name "*.h" -o -name "*.cc" | \
find verible -name "*.h" -o -name "*.cc" | \
xargs grep -n '#include <regex>'
if [ $? -eq 0 ]; then
echo "::error:: Don't use stdlib regex, it is slow and requires exceptions. Use RE2 instead (https://github.com/google/re2; header #include \"re2/re2.h\")."
Expand Down
25 changes: 13 additions & 12 deletions .github/bin/smoke-test.sh
Original file line number Diff line number Diff line change
Expand Up @@ -138,10 +138,11 @@ ExpectedFailCount[lint:ibex]=14
ExpectedFailCount[project:ibex]=211
ExpectedFailCount[preprocessor:ibex]=385

ExpectedFailCount[syntax:opentitan]=53
ExpectedFailCount[lint:opentitan]=53
ExpectedFailCount[project:opentitan]=868
ExpectedFailCount[preprocessor:opentitan]=2381
ExpectedFailCount[syntax:opentitan]=61
ExpectedFailCount[lint:opentitan]=61
ExpectedFailCount[project:opentitan]=943
ExpectedFailCount[formatter:opentitan]=1
ExpectedFailCount[preprocessor:opentitan]=2555

ExpectedFailCount[syntax:sv-tests]=77
ExpectedFailCount[lint:sv-tests]=76
Expand Down Expand Up @@ -181,10 +182,10 @@ ExpectedFailCount[lint:XilinxUnisimLibrary]=4
ExpectedFailCount[project:XilinxUnisimLibrary]=22
ExpectedFailCount[preprocessor:XilinxUnisimLibrary]=96

ExpectedFailCount[syntax:black-parrot]=160
ExpectedFailCount[lint:black-parrot]=160
ExpectedFailCount[project:black-parrot]=175
ExpectedFailCount[preprocessor:black-parrot]=176
ExpectedFailCount[syntax:black-parrot]=154
ExpectedFailCount[lint:black-parrot]=154
ExpectedFailCount[project:black-parrot]=169
ExpectedFailCount[preprocessor:black-parrot]=170

ExpectedFailCount[syntax:ivtest]=166
ExpectedFailCount[lint:ivtest]=166
Expand All @@ -210,11 +211,11 @@ ExpectedFailCount[preprocessor:scr1]=46
ExpectedFailCount[project:serv]=1
ExpectedFailCount[preprocessor:serv]=1

ExpectedFailCount[syntax:basejump_stl]=474
ExpectedFailCount[lint:basejump_stl]=474
ExpectedFailCount[project:basejump_stl]=588
ExpectedFailCount[syntax:basejump_stl]=478
ExpectedFailCount[lint:basejump_stl]=478
ExpectedFailCount[project:basejump_stl]=593
ExpectedFailCount[formatter:basejump_stl]=1
ExpectedFailCount[preprocessor:basejump_stl]=623
ExpectedFailCount[preprocessor:basejump_stl]=629

ExpectedFailCount[syntax:opl3_fpga]=3
ExpectedFailCount[lint:opl3_fpga]=3
Expand Down
10 changes: 5 additions & 5 deletions .github/workflows/verible-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -141,10 +141,10 @@ jobs:
# that makes it into the compile. Use bant itself to find genrules.
bazel fetch ...
bazel build $(bin/bant -q genrule-outputs | awk '{print $2}') \
//common/analysis:command-file-lexer \
//verilog/parser:verilog-lex \
//verilog/parser:verilog-y \
//verilog/parser:verilog-y-final
//verible/common/analysis:command-file-lexer \
//verible/verilog/parser:verilog-lex \
//verible/verilog/parser:verilog-y \
//verible/verilog/parser:verilog-y-final
- name: Run bant build-cleaner
run: |
Expand Down Expand Up @@ -386,7 +386,7 @@ jobs:
MacOsBuild:
# New MacOS has a broken patch utility:
# //verilog/tools/lint:lint-tool_test trips over a no-newline-at-end-of-file
# //verible/verilog/tools/lint:lint-tool_test trips over a no-newline-at-end-of-file
runs-on: macos-12
steps:

Expand Down
32 changes: 16 additions & 16 deletions BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -23,26 +23,26 @@ license(
filegroup(
name = "install-binaries",
srcs = [
"//common/tools:verible-patch-tool",
"//verilog/tools/diff:verible-verilog-diff",
"//verilog/tools/formatter:verible-verilog-format",
"//verilog/tools/kythe:verible-verilog-kythe-extractor",
"//verilog/tools/kythe:verible-verilog-kythe-kzip-writer",
"//verilog/tools/lint:verible-verilog-lint",
"//verilog/tools/ls:verible-verilog-ls",
"//verilog/tools/obfuscator:verible-verilog-obfuscate",
"//verilog/tools/preprocessor:verible-verilog-preprocessor",
"//verilog/tools/project:verible-verilog-project",
"//verilog/tools/syntax:verible-verilog-syntax",
"//verible/common/tools:verible-patch-tool",
"//verible/verilog/tools/diff:verible-verilog-diff",
"//verible/verilog/tools/formatter:verible-verilog-format",
"//verible/verilog/tools/kythe:verible-verilog-kythe-extractor",
"//verible/verilog/tools/kythe:verible-verilog-kythe-kzip-writer",
"//verible/verilog/tools/lint:verible-verilog-lint",
"//verible/verilog/tools/ls:verible-verilog-ls",
"//verible/verilog/tools/obfuscator:verible-verilog-obfuscate",
"//verible/verilog/tools/preprocessor:verible-verilog-preprocessor",
"//verible/verilog/tools/project:verible-verilog-project",
"//verible/verilog/tools/syntax:verible-verilog-syntax",
],
)

filegroup(
name = "install-scripts",
srcs = [
"//common/tools:verible-transform-interactive",
"//verilog/tools/formatter:git-verilog-format",
"//verilog/tools/formatter:verible-verilog-format-changed-lines-interactive",
"//verible/common/tools:verible-transform-interactive",
"//verible/verilog/tools/formatter:git-verilog-format",
"//verible/verilog/tools/formatter:verible-verilog-format-changed-lines-interactive",
],
)

Expand All @@ -55,9 +55,9 @@ alias(
genrule(
name = "lint_doc",
outs = ["documentation_verible_lint_rules.md"],
cmd = "$(location //verilog/tools/lint:verible-verilog-lint) " +
cmd = "$(location //verible/verilog/tools/lint:verible-verilog-lint) " +
"--generate_markdown > $(OUTS)",
tools = [
"//verilog/tools/lint:verible-verilog-lint",
"//verible/verilog/tools/lint:verible-verilog-lint",
],
)
4 changes: 2 additions & 2 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -189,8 +189,8 @@ bazel build -c opt //...

You can access the generated artifacts under `bazel-bin/`. For instance the
syntax checker will be at
`bazel-bin/verilog/tools/syntax/verible-verilog-syntax` (corresponding to the
target name `//verilog/tools/syntax:verible-verilog-syntax`).
`bazel-bin/verible/verilog/tools/syntax/verible-verilog-syntax` (corresponding to the
target name `//verible/verilog/tools/syntax:verible-verilog-syntax`).

Moreover, if you need statically linked executables that don't depend on your
shared libraries, you can use custom config
Expand Down
2 changes: 1 addition & 1 deletion doc/formatter.md
Original file line number Diff line number Diff line change
Expand Up @@ -147,7 +147,7 @@ Real world [TreeUnwrapper] example:
echo 'module m; initial a = b + c; endmodule' | \
VERIBLE_LOGTHRESHOLD=0 \
VERIBLE_VLOG_DETAIL=8 \
bazel run //verilog/tools/formatter:verible-verilog-format -- -show_token_partition_tree -
bazel run //verible/verilog/tools/formatter:verible-verilog-format -- -show_token_partition_tree -
```
### Alignment
Expand Down
2 changes: 1 addition & 1 deletion doc/indexing.md
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@ renaming isn’t needed here but you can add the renaming you find suitable.
bazel test --experimental_action_listener=:extract_cxx //...

# run on specific target (e.g. some cc_binary or cc_library)
bazel test --experimental_action_listener=:extract_cxx //verilog/analysis:default_rules
bazel test --experimental_action_listener=:extract_cxx //verible/verilog/analysis:default_rules
```

Extracted kzip files will be in
Expand Down
4 changes: 2 additions & 2 deletions kythe-browse.sh
Original file line number Diff line number Diff line change
Expand Up @@ -41,10 +41,10 @@ KYTHE_OUT="./kythe-out"
# make sure to pass the correct public_resources directory to http_server.
rm -f -- ${KYTHE_OUT}/graphstore/* ${KYTHE_OUT}/tables/*
mkdir -p ${KYTHE_OUT}/graphstore ${KYTHE_OUT}/tables
bazel build -c opt //verilog/tools/kythe:all
bazel build -c opt //verible/verilog/tools/kythe:all

# Read JSON entries from standard in to a graphstore.
bazel-bin/verilog/tools/kythe/verible-verilog-kythe-extractor --file_list_path "$1" --file_list_root "$2" --print_kythe_facts json --include_dir_paths "$3" > "${KYTHE_OUT}"/entries
bazel-bin/verible/verilog/tools/kythe/verible-verilog-kythe-extractor --file_list_path "$1" --file_list_root "$2" --print_kythe_facts json --include_dir_paths "$3" > "${KYTHE_OUT}"/entries
# Write entry stream into a GraphStore
"${KYTHE_BINDIR}"/entrystream --read_format=json < "${KYTHE_OUT}"/entries \
| "${KYTHE_BINDIR}"/write_entries -graphstore "${KYTHE_OUT}"/graphstore
Expand Down
2 changes: 1 addition & 1 deletion third_party/portable_endian/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -3,5 +3,5 @@ licenses(["unencumbered"])
cc_library(
name = "portable_endian",
hdrs = ["portable_endian.h"],
visibility = ["//common/util:__pkg__"],
visibility = ["//verible/common/util:__pkg__"],
)
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