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Add SRAM OMReader for T1 #791

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fdcd498
[build system] remove legacy Elaborator
sequencer Oct 11, 2024
604723f
[build system] make TestBench Serializable
sequencer Oct 11, 2024
f48534b
[build system] use SerializableModuleElaborator from upstream
sequencer Oct 11, 2024
a10d50d
[config] refactor T1 configs
sequencer Oct 11, 2024
028cafb
[build system] Add elaborator for T1, T1EMU, T1RocketEmu
sequencer Oct 11, 2024
5bb3dac
[config] add all configs via toml
Avimitin Oct 12, 2024
e1c736c
[nix] remove configgen and merge omreader into mill module
Avimitin Oct 12, 2024
20351ff
[nix] use latest elaborator cmdline for chisel-to-mlirbc
Avimitin Oct 12, 2024
ec277d8
[nix] rewrite to latest TOP lowering methods
Avimitin Oct 12, 2024
bfb1ddd
[nix] remove outdated standalone t1rocket attribute
Avimitin Oct 12, 2024
b0b2e60
[difftest] suffix all dpi module with -emu
Avimitin Oct 12, 2024
2805223
[ci] fix CI script to use latest nix structure
Avimitin Oct 12, 2024
0470102
[script] fix emu script to latest nix attr
Avimitin Oct 12, 2024
ec2a599
[ci] clean up CI run targets
Avimitin Oct 12, 2024
69ca5f7
[nix] add debug build for ci script
Avimitin Oct 14, 2024
82f9bd2
[script] add new "--top" option to all sub targets
Avimitin Oct 14, 2024
4217bd4
[ci] add multiple top support for emulator tests
Avimitin Oct 14, 2024
7e398cd
[ci] change test case layout
Avimitin Oct 14, 2024
bd3c5da
[script] add new "--top" option to all sub targets
Avimitin Oct 14, 2024
5b026d0
[om] add SRAM Path to Rocket
sequencer Oct 13, 2024
a279d4a
[om] add SRAM Path to VRF
sequencer Oct 13, 2024
9fc0732
[om] refactor the omreader API
sequencer Oct 13, 2024
2e285f1
[nix] fix multiple main in omreader
Avimitin Oct 14, 2024
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9 changes: 0 additions & 9 deletions .github/cases/blastoise/perf.json

This file was deleted.

5 changes: 0 additions & 5 deletions .github/cases/machamp/perf.json

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9 changes: 0 additions & 9 deletions .github/cases/psyduck/perf.json

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5 changes: 0 additions & 5 deletions .github/cases/sandslash/perf.json

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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,6 @@
"pytorch.demo": 76,
"pytorch.lenet": 394687,
"pytorch.matmul": 14497,
"pytorch.mobilenet": 15139469,
"mlir.rvv_vp_intrinsic_add": 435,
"mlir.rvv_vp_intrinsic_add_scalable": 583,
"mlir.hello": 145,
Expand Down Expand Up @@ -514,4 +513,5 @@
"rvv_bench.poly1305": 3,
"rvv_bench.strlen": 30374,
"rvv_bench.utf8_count": 204907
}
}

Original file line number Diff line number Diff line change
Expand Up @@ -445,4 +445,4 @@
"rvv_bench.poly1305": 3,
"rvv_bench.strlen": 23510,
"rvv_bench.utf8_count": 185060
}
}
Original file line number Diff line number Diff line change
Expand Up @@ -526,4 +526,4 @@
"rvv_bench.poly1305": 3,
"rvv_bench.strlen": 30374,
"rvv_bench.utf8_count": 204907
}
}
Original file line number Diff line number Diff line change
Expand Up @@ -445,4 +445,4 @@
"rvv_bench.poly1305": 3,
"rvv_bench.strlen": 19386,
"rvv_bench.utf8_count": 154750
}
}
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