[rtl] fix decode in MulDiv.

chipsalliance · Aug 19, 2024 · b83db43 · b83db43
1 parent 5f3417d
commit b83db43
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Showing 3 changed files with 26 additions and 14 deletions.
diff --git a/elaborator/src/rocketv/MulDiv.scala b/elaborator/src/rocketv/MulDiv.scala
@@ -3,7 +3,7 @@
 package org.chipsalliance.t1.elaborator.rocketv
 
 import mainargs._
-import org.chipsalliance.rocketv.{MulDiv, MulDivParameter}
+import org.chipsalliance.rocketv.{DecoderParameter, MulDiv, MulDivParameter}
 import org.chipsalliance.t1.elaborator.Elaborator
 
 object MulDiv extends Elaborator {
@@ -16,7 +16,15 @@ object MulDiv extends Elaborator {
     @arg(name = "divEarlyOut") divEarlyOut:                       Boolean,
     @arg(name = "divEarlyOutGranularity") divEarlyOutGranularity: Int,
     @arg(name = "mulUnroll") mulUnroll:                           Int,
-    @arg(name = "mulEarlyOut") mulEarlyOut:                       Boolean) {
+    @arg(name = "mulEarlyOut") mulEarlyOut:                       Boolean,
+    @arg(name = "instructionSets") instructionSets:     Set[String],
+    @arg(name = "pipelinedMul") pipelinedMul:           Boolean,
+    @arg(name = "fenceIFlushDCache") fenceIFlushDCache: Boolean) {
+    def decodeParam: DecoderParameter = DecoderParameter(
+      instructionSets,
+      pipelinedMul,
+      fenceIFlushDCache
+    )
     def convert: MulDivParameter = MulDivParameter(
       useAsyncReset,
       latency,
@@ -25,7 +33,8 @@ object MulDiv extends Elaborator {
       divEarlyOut,
       divEarlyOutGranularity,
       mulUnroll,
-      mulEarlyOut
+      mulEarlyOut,
+      decodeParam
     )
   }
 

diff --git a/rocketv/src/MulDiv.scala b/rocketv/src/MulDiv.scala
@@ -20,20 +20,21 @@ case class MulDivParameter(useAsyncReset: Boolean,
                            divEarlyOut: Boolean,
                            divEarlyOutGranularity: Int,
                            mulUnroll: Int,
-                           mulEarlyOut: Boolean)
+                           mulEarlyOut: Boolean,
+                           decoderParameter: DecoderParameter)
   extends SerializableModuleParameter {
   // optional to 16 when rve?
   val nXpr:     Int = 32
   val uopWidth: Int = 4
 
-  def FN_MUL = 1.U(4.W)
-  def FN_MULH = 2.U(4.W)
-  def FN_MULHU = 3.U(4.W)
-  def FN_MULHSU = 4.U(4.W)
-  def FN_DIV = 4.U(4.W)
-  def FN_REM = 5.U(4.W)
-  def FN_DIVU = 6.U(4.W)
-  def FN_REMU = 7.U(4.W)
+  def FN_MUL = decoderParameter.UOPALU.mul
+  def FN_MULH = decoderParameter.UOPALU.mulh
+  def FN_MULHU = decoderParameter.UOPALU.mulhu
+  def FN_MULHSU = decoderParameter.UOPALU.mulhsu
+  def FN_DIV = decoderParameter.UOPALU.div
+  def FN_REM = decoderParameter.UOPALU.rem
+  def FN_DIVU = decoderParameter.UOPALU.divu
+  def FN_REMU = decoderParameter.UOPALU.remu
   def DW_32 = false.B
 }
 class MulDivInterface(parameter: MulDivParameter) extends Bundle {
@@ -62,7 +63,7 @@ class MulDiv(val parameter: MulDivParameter)
   }
 
   def N = BitPat.N()
-  def Y = BitPat.N()
+  def Y = BitPat.Y()
   def X = BitPat.dontCare(1)
 
   val w = io.req.bits.in1.getWidth

diff --git a/rocketv/src/RocketCore.scala b/rocketv/src/RocketCore.scala
@@ -281,7 +281,9 @@ case class RocketParameter(
     divEarlyOut:            Boolean,
     divEarlyOutGranularity: Int,
     mulUnroll:              Int,
-    mulEarlyOut:            Boolean)
+    mulEarlyOut:            Boolean,
+    decoderParameter:       DecoderParameter
+  )
   val mulParameter: Option[PipelinedMultiplierParameter] = Option.when(usingMulDiv && mulUnroll == xLen)(PipelinedMultiplierParameter(
     useAsyncReset: Boolean,
     2,