[ipemu] gate dpi call with !reset to work around verilator scheduling…

… bug
chipsalliance · Jul 30, 2024 · 0fc1375 · 0fc1375
1 parent 45e7714
commit 0fc1375
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/ipemu/src/TestBench.scala b/ipemu/src/TestBench.scala
@@ -113,7 +113,7 @@ class TestBench(generator: SerializableModuleGenerator[T1, T1Parameter])
   val issue = WireDefault(0.U.asTypeOf(new Issue))
   val fence = RegInit(false.B)
   val outstanding = RegInit(0.U(4.W))
-  val doIssue: Bool = dut.io.issue.ready && !fence
+  val doIssue: Bool = dut.io.issue.ready && !fence && !reset
   outstanding := outstanding + (doIssue && (issue.meta === 1.U)) - dut.io.issue.valid
   // used to gate Xprop when DPI hasn't issued yet.
   val didIssue = RegInit(false.B)