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Bump Yosys #2008

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Sep 30, 2023
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40 changes: 35 additions & 5 deletions tests/formal/passlist.txt
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,8 @@ simple:ConstSizes/dut.v
simple:ContinueWhile/top.sv
simple:CppMacroNameAsVariableName/top.sv
simple:DeclarationInFor/top.sv
simple:DisplayWithBinFormatSpecifier/top.sv
simple:DisplayWithHexFormatSpecifier/top.sv
simple:DivisionOfSize/top.sv
simple:DotMultirange/top.sv
simple:DotRange/top.sv
Expand Down Expand Up @@ -267,30 +269,39 @@ sv2v:basic/gen_case.sv
sv2v:basic/mutual_recursion.sv
sv2v:basic/shift.sv
sv2v:basic/simplify_arg_shadow.sv
sv2v:basic/simplify_binop.sv
sv2v:basic/simplify_genvar_shadow.sv
sv2v:basic/simplify_scope.sv
sv2v:basic/simplify_type.sv
sv2v:basic/string_param_plain.sv
sv2v:basic/typeof_op.sv
sv2v:core/always_latch.sv
sv2v:core/always_latch.v
sv2v:core/ambiguous_tore.v
sv2v:core/array_in_package.v
sv2v:core/assert.v
sv2v:core/bit.sv
sv2v:core/bit.v
sv2v:core/case_inside_cast.v
sv2v:core/cast_conflict.sv
sv2v:core/cast_conflict.v
sv2v:core/cast_literal.sv
sv2v:core/class_ident.sv
sv2v:core/class_ident.v
sv2v:core/class_param_nest.sv
sv2v:core/class_param_nest.v
sv2v:core/constexpr.v
sv2v:core/data_lifetime.sv
sv2v:core/data_lifetime.v
sv2v:core/edge.sv
sv2v:core/edge.v
sv2v:core/empty_args.sv
sv2v:core/empty_args.v
sv2v:core/empty_args_hier.sv
sv2v:core/empty_args_hier.v
sv2v:core/empty_constructs.sv
sv2v:core/empty_constructs.v
sv2v:core/end_labels.v
sv2v:core/enum_typedef_keep.sv
sv2v:core/enum_typedef_keep.v
sv2v:core/for_loop_inits.v
sv2v:core/function_range_cast.v
sv2v:core/function_ret_unpacked.v
Expand All @@ -303,9 +314,12 @@ sv2v:core/input_int.sv
sv2v:core/input_int.v
sv2v:core/interface_array_indirect.v
sv2v:core/interface_array_single.v
sv2v:core/interface_based_typedef.v
sv2v:core/interface_based_typedef_delay.v
sv2v:core/interface_func.sv
sv2v:core/interface_func.v
sv2v:core/interface_struct_label.v
sv2v:core/interface_struct_param.v
sv2v:core/interface_type_param.sv
sv2v:core/interface_type_param.v
sv2v:core/localparamtype.v
Expand All @@ -320,19 +334,28 @@ sv2v:core/multipack_struct_cast.v
sv2v:core/multi_array_decl.sv
sv2v:core/multi_array_decl.v
sv2v:core/named_genblk_cascade.v
sv2v:core/nest_order.sv
sv2v:core/nest_order.v
sv2v:core/net_base_type.v
sv2v:core/net_or_var.sv
sv2v:core/net_or_var.v
sv2v:core/non_ansi_port_decl_order.sv
sv2v:core/non_ansi_port_decl_order.v
sv2v:core/no_default_param.v
sv2v:core/number_concat.sv
sv2v:core/number_concat.v
sv2v:core/output_implicit.sv
sv2v:core/output_implicit.v
sv2v:core/package.v
sv2v:core/package_decl_init.v
sv2v:core/package_decl_reorder.sv
sv2v:core/package_decl_reorder.v
sv2v:core/package_enum_3.sv
sv2v:core/package_enum_3.v
sv2v:core/package_enum_4.sv
sv2v:core/package_enum_4.v
sv2v:core/package_enum_5.sv
sv2v:core/package_enum_5.v
sv2v:core/package_export_nothing.sv
sv2v:core/package_export_nothing.v
sv2v:core/package_export_wildcard.sv
Expand All @@ -353,6 +376,8 @@ sv2v:core/package_self_reference_import.sv
sv2v:core/package_self_reference_import.v
sv2v:core/package_self_reference_shadow.sv
sv2v:core/package_self_reference_shadow.v
sv2v:core/package_shadow.sv
sv2v:core/package_shadow.v
sv2v:core/package_typedef_nested.sv
sv2v:core/package_typedef_nested.v
sv2v:core/paramtype.v
Expand All @@ -371,7 +396,9 @@ sv2v:core/sign_cast.sv
sv2v:core/sign_cast.v
sv2v:core/simple_loop_jump.sv
sv2v:core/simple_loop_jump.v
sv2v:core/simplify_func.v
sv2v:core/string.v
sv2v:core/string_cast.sv
sv2v:core/string_type.sv
sv2v:core/string_type.v
sv2v:core/struct_array.v
Expand All @@ -384,6 +411,8 @@ sv2v:core/struct_bit_struct.sv
sv2v:core/struct_bit_struct.v
sv2v:core/struct_const.sv
sv2v:core/struct_const.v
sv2v:core/struct_hier_nocast.sv
sv2v:core/struct_hier_nocast.v
sv2v:core/struct_param.v
sv2v:core/struct_part_select.sv
sv2v:core/struct_part_select.v
Expand Down Expand Up @@ -417,19 +446,19 @@ sv2v:error/macro_args_empty.sv
sv2v:error/macro_arg_bad_name.sv
sv2v:error/size_cast_neg_lit_1.sv
sv2v:error/size_cast_neg_lit_2.sv
sv2v:error/size_cast_xpr_lit.sv
sv2v:error/size_cast_x_lit.sv
sv2v:error/size_cast_zero_lit.sv
sv2v:lex/block_comment.sv
sv2v:lex/block_comment.v
sv2v:lex/comment_no_space.sv
sv2v:lex/latin1.sv
sv2v:lex/line.v
sv2v:lex/macro_arg_comment.v
sv2v:lex/macro_arg_escape.sv
sv2v:lex/macro_macro.v
sv2v:lex/macro_string.sv
sv2v:lex/macro_vendor_comment.sv
sv2v:lex/no_newline.sv
sv2v:lex/number.sv
sv2v:lex/number_literal_whitespace.v
sv2v:lex/string_macro.v
sv2v:lex/undefineall.sv
sv2v:lex/undefineall.v
Expand Down Expand Up @@ -659,6 +688,7 @@ yosys:simple/mem2reg_bounds_tern.v
yosys:simple/memwr_port_connection.sv
yosys:simple/mem_arst.v
yosys:simple/module_scope_case.v
yosys:simple/multiplier.v
yosys:simple/named_genblk.v
yosys:simple/nested_genblk_resolve.v
yosys:simple/omsp_dbg_uart.v
Expand Down
12 changes: 12 additions & 0 deletions tests/formal/skiplist.txt
Original file line number Diff line number Diff line change
Expand Up @@ -66,3 +66,15 @@ sv2v:core/paramtype_param_default.sv
sv2v:core/paramtype_stagger.sv
# Yosys mishandles a negative signed constant which is interpreted correctly by the plugin.
yosys:simple/case_expr_non_const.v
# Yosys hangs and causes a timeout.
# There's nothing to compare with the plugin in Formal Verification.
# Also these tests are non-synthesizable.
sv2v:error/size_cast_xpr_lit.sv
sv2v:error/size_cast_x_lit.sv
sv2v:error/size_cast_zero_lit.sv
# Yosys aborts in Fmt::parse_verilog due to unsupported format.
# There's nothing to compare with the plugin in Formal Verification.
# This test is non-synthesizable.
sv2v:core/edge.v
# Yosys fails with syntax error, unexpected TOK_ID. This test is non-synthesizable.
sv2v:core/edge.sv
1 change: 0 additions & 1 deletion tests/simple_tests/InterfaceAlways/yosys_script.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -3,4 +3,3 @@ source ../yosys_common.tcl
prep -top \\top
write_verilog
write_verilog yosys.sv
sim -rstlen 10 -vcd dump.vcd
1 change: 0 additions & 1 deletion tests/simple_tests/InterfaceAssign/yosys_script.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -3,4 +3,3 @@ source ../yosys_common.tcl
prep -top \\top
write_verilog
write_verilog yosys.sv
sim -rstlen 10 -vcd dump.vcd
1 change: 0 additions & 1 deletion tests/simple_tests/InterfaceInitial/yosys_script.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -3,4 +3,3 @@ source ../yosys_common.tcl
prep -top \\top
write_verilog
write_verilog yosys.sv
sim -rstlen 10 -vcd dump.vcd
1 change: 0 additions & 1 deletion tests/simple_tests/OneNetInterf/yosys_script.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -3,4 +3,3 @@ source ../yosys_common.tcl
prep -top \\dut
write_verilog
write_verilog yosys.sv
sim -clock i -rstlen 10 -vcd dump.vcd
1 change: 0 additions & 1 deletion tests/simple_tests/OneNetRange/yosys_script.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -3,4 +3,3 @@ source ../yosys_common.tcl
prep -top \\dut
write_verilog
write_verilog yosys.sv
sim -clock i -rstlen 10 -vcd dump.vcd
2 changes: 1 addition & 1 deletion third_party/yosys
Submodule yosys updated 147 files
52 changes: 26 additions & 26 deletions third_party/yosys_mod/simplify.cc
Original file line number Diff line number Diff line change
Expand Up @@ -702,24 +702,31 @@ bool simplify(Yosys::AST::AstNode *ast_node, bool const_fold, bool at_zero, bool
// This code implements only a small subset of Verilog-2005 $display() format specifiers,
// but should be good enough for most uses
if ((ast_node->type == Yosys::AST::AST_TCALL) && ((ast_node->str == "$display") || (ast_node->str == "$write"))) {
int nargs = GetSize(ast_node->children);
if (nargs < 1)
log_file_error(ast_node->filename, ast_node->location.first_line, "System task `%s' got %d arguments, expected >= 1.\n",
ast_node->str.c_str(), int(ast_node->children.size()));

// First argument is the format string
Yosys::AST::AstNode *node_string = ast_node->children[0];
while (simplify(node_string, true, false, false, stage, width_hint, sign_hint, false)) {
if (!current_always) {
log_file_warning(ast_node->filename, ast_node->location.first_line, "System task `%s' outside initial or always block is unsupported.\n",
ast_node->str.c_str());
} else if (current_always->type == Yosys::AST::AST_INITIAL) {
int default_base = 10;
if (ast_node->str.back() == 'b')
default_base = 2;
else if (ast_node->str.back() == 'o')
default_base = 8;
else if (ast_node->str.back() == 'h')
default_base = 16;

// when $display()/$write() functions are used in an initial block, print them during synthesis
Fmt fmt = ast_node->processFormat(stage, /*sformat_like=*/false, default_base);
if (ast_node->str.substr(0, 8) == "$display")
fmt.append_string("\n");
log("%s", fmt.render().c_str());
} else {
// when $display()/$write() functions are used in an always block, simplify the expressions and
// convert them to a special cell later in genrtlil
for (auto node : ast_node->children)
while (node->simplify(true, false, stage, -1, false, false)) {
}
return false;
}
if (node_string->type != Yosys::AST::AST_CONSTANT)
log_file_error(ast_node->filename, ast_node->location.first_line, "Failed to evaluate system task `%s' with non-constant 1st argument.\n",
ast_node->str.c_str());
std::string sformat = node_string->bitsAsConst().decode_string();
std::string sout = ast_node->process_format_str(sformat, 1, stage, width_hint, sign_hint);
// Finally, print the message (only include a \n for $display, not for $write)
log("%s", sout.c_str());
if (ast_node->str == "$display")
log("\n");
ast_node->delete_children();
ast_node->str = std::string();
}
Expand Down Expand Up @@ -3441,15 +3448,8 @@ skip_dynamic_range_lvalue_expansion:;
}

if (ast_node->str == "\\$sformatf") {
Yosys::AST::AstNode *node_string = ast_node->children[0];
while (simplify(node_string, true, false, false, stage, width_hint, sign_hint, false)) {
}
if (node_string->type != Yosys::AST::AST_CONSTANT)
log_file_error(ast_node->filename, ast_node->location.first_line,
"Failed to evaluate system function `%s' with non-constant 1st argument.\n", ast_node->str.c_str());
std::string sformat = node_string->bitsAsConst().decode_string();
std::string sout = ast_node->process_format_str(sformat, 1, stage, width_hint, sign_hint);
newNode = ast_node->mkconst_str(sout);
Fmt fmt = ast_node->processFormat(stage, /*sformat_like=*/true);
newNode = Yosys::AST::AstNode::mkconst_str(fmt.render());
goto apply_newNode;
}

Expand Down
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