Add alias for write_rtlil only when ilang frontend doesn't exist

chipsalliance · Nov 26, 2024 · 144fb82 · 144fb82
1 parent fa2bcb1
commit 144fb82
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Showing 6 changed files with 21 additions and 5 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -264,7 +264,7 @@ set(synlig_SRC
     ${PROJECT_SOURCE_DIR}/src/mods/yosys_ast/synlig_const2ast.cc
     ${PROJECT_SOURCE_DIR}/src/mods/yosys_ast/synlig_edif.cc
     ${PROJECT_SOURCE_DIR}/src/mods/yosys_ast/synlig_simplify.cc
-    ${PROJECT_SOURCE_DIR}/src/mods/yosys_ast/synlig_write_ilang.cc)
+    ${PROJECT_SOURCE_DIR}/src/mods/yosys_ast/synlig_ilang.cc)
 
 add_library(synlig SHARED ${synlig_SRC})
 

diff --git a/src/frontends/systemverilog/Build.mk b/src/frontends/systemverilog/Build.mk
@@ -17,7 +17,7 @@ ${ts}.sources := \
 	${${ts}.mod_dir}synlig_const2ast.cc \
 	${${ts}.mod_dir}synlig_edif.cc \
 	${${ts}.mod_dir}synlig_simplify.cc \
-	${${ts}.mod_dir}synlig_write_ilang.cc
+	${${ts}.mod_dir}synlig_ilang.cc
 
 define ${ts}.env =
 export PKG_CONFIG_PATH=$(call ShQuote,${$(call GetTargetStructName,surelog).output_vars.PKG_CONFIG_PATH}$(if ${PKG_CONFIG_PATH},:${PKG_CONFIG_PATH}))

diff --git a/src/frontends/systemverilog/uhdm_common_frontend.cc b/src/frontends/systemverilog/uhdm_common_frontend.cc
@@ -19,6 +19,7 @@
 
 #include "uhdm_common_frontend.h"
 #include "synlig_edif.h"
+#include "synlig_ilang.h"
 
 #ifdef __linux__
 namespace Yosys
@@ -45,7 +46,11 @@ static void set_line_num(int) {}
 /* Stub for AST::process */
 static int get_line_num(void) { return 1; }
 
-UhdmCommonFrontend::UhdmCommonFrontend(std::string name, std::string short_help) : Frontend(name, short_help) { register_synlig_edif_backend(); }
+UhdmCommonFrontend::UhdmCommonFrontend(std::string name, std::string short_help) : Frontend(name, short_help)
+{
+    register_synlig_edif_backend();
+    Synlig::register_synlig_ilang_alias();
+}
 
 void UhdmCommonFrontend::print_read_options()
 {

diff --git a/src/mods/yosys_ast/Makefile.inc b/src/mods/yosys_ast/Makefile.inc
@@ -4,4 +4,4 @@ CXXFLAGS += -I $(SYNLIG_SRC)/mods/yosys_ast
 SYNLIG_OBJS += mods/yosys_ast/synlig_const2ast.o
 SYNLIG_OBJS += mods/yosys_ast/synlig_edif.o
 SYNLIG_OBJS += mods/yosys_ast/synlig_simplify.o
-SYNLIG_OBJS += mods/yosys_ast/synlig_write_ilang.o
+SYNLIG_OBJS += mods/yosys_ast/synlig_ilang.o
diff --git a/src/mods/yosys_ast/synlig_write_ilang.cc → src/mods/yosys_ast/synlig_ilang.cc b/src/mods/yosys_ast/synlig_write_ilang.cc → src/mods/yosys_ast/synlig_ilang.cc
@@ -19,6 +19,13 @@ struct WriteIlangAlias : public Pass {
             cmd += " " + args[i];
         run_pass(cmd, design);
     }
-} WriteIlangAliasPass;
+};
 
+void register_synlig_ilang_alias()
+{
+    if (!pass_register.count("write_ilang")) {
+        static WriteIlangAlias *write_ilang_alias = new WriteIlangAlias;
+        write_ilang_alias->init_register();
+    }
+}
 } // namespace Synlig
diff --git a/src/mods/yosys_ast/synlig_ilang.h b/src/mods/yosys_ast/synlig_ilang.h
@@ -0,0 +1,4 @@
+namespace Synlig
+{
+void register_synlig_ilang_alias();
+}