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Struct hier path #5315

Job	Run time
Build sv2v	2m 24s
Emit Workflow Info	0s
Style check	1m 22s
Build Binaries	4m 44s
Upload GHA event file	2s
Test "Installation from source" from README	50m 50s
Build Binaries (for Debian)	4m 47s
Build Binaries (ASAN)	8m 57s
Test With Packaged Yosys	1m 53s
Formal Verification Tests / simple	14m 26s
Formal Verification Tests / sv2v	18m 37s
Formal Verification Tests / yosys	17m 3s
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs	8m 48s
Large Designs Tests / Ibex (Vivado synthesis)	6m 5s
Large Designs Tests / Black Parrot (AMD (Xilinx) FPGA synthesis)	22m 33s
Large Designs Tests / Black Parrot (ASIC synthesis)	1h 9m 23s
Large Designs Tests / Ibex (F4PGA synthesis)	11m 4s
Large Designs Tests / Opentitan 9d82960888 (synthesis)	57m 33s
Large Designs Tests / Opentitan parsing (full/top-down)	3h 30m 18s
Large Designs Tests / Opentitan parsing (quick)	1h 4m 30s
Large Designs Tests / Opentitan (synthesis)	2h 20m 10s
Large Designs Tests / VeeR-EH1 (synthesis)	7m 0s
Parsing Tests / SystemVerilog Plugin	29m 32s
Parsing Tests / Surelog	21m 26s
Formal Verification Tests / Passlist Check	1m 7s
Parsing Tests / Summary Generation	1m 41s
Parsing Tests / Generate AST diff	0s
Release Package	0s
Release Package Installation Test	0s
	12h 56m 15s

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