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Build(deps): Bump third_party/black_parrot_sdk from `f92dc46` to `1e61d91` #6065

Job	Run time
Build Synlig Release	4m 48s
Build Plugin	4m 15s
Build Synlig (ASAN)	7m 38s
Build Package	4m 46s
Build PySynlig	10m 13s
Build tools	10m 42s
Emit Workflow Info	0s
Style check	1m 46s
Verify README Correctness (Installation From Sources)	40m 56s
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs	6m 49s
Large Designs Tests / Opentitan 9d82960888 (synthesis)	35m 1s
Large Designs Tests / Ibex (F4PGA synthesis)	11m 43s
Large Designs Tests / Ibex (Vivado synthesis)	6m 43s
Large Designs Tests / Opentitan (synthesis)	1h 10m 42s
Large Designs Tests / Black Parrot (AMD (Xilinx) FPGA synthesis)	16m 33s
Large Designs Tests / Opentitan parsing (full/top-down)	12m 56s
Large Designs Tests / Opentitan parsing (quick)	5m 28s
Large Designs Tests / VeeR-EH1 (synthesis)	6m 28s
Large Designs Tests / Black Parrot (ASIC synthesis)	42m 39s
Large Designs Tests / Black Parrot (AMD (Xilinx) with PySynlig)	41m 8s
Parsing Tests / Test read_systemverilog release	4m 55s
Parsing Tests / Test read_uhdm release	4m 46s
Parsing Tests / Test read_systemverilog plugin	5m 6s
Parsing Tests / Test read_uhdm plugin	4m 45s
Parsing Tests / Test read_systemverilog asan	35m 27s
Parsing Tests / Test read_uhdm asan	25m 47s
Formal Verification Tests / simple	17m 44s
Formal Verification Tests / sv2v	17m 16s
Formal Verification Tests / yosys	14m 55s
Parsing Tests / Generate AST diff	1m 49s
Parsing Tests / Summary Generation	1m 24s
Release Package	0s
Verify README Correctness (Download And Run Release)	0s
	7h 55m 8s

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