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Remove VeeR asserts from simulation builds #4943

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merged 2 commits into from
Sep 5, 2023

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robertszczepanski
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Fixes #4941.

@robertszczepanski robertszczepanski changed the title [WIP] Remove VeeR asserts from simulation builds Remove VeeR asserts from simulation builds Sep 4, 2023
@robertszczepanski robertszczepanski marked this pull request as ready for review September 4, 2023 14:17
@robertszczepanski robertszczepanski marked this pull request as draft September 4, 2023 14:21
@robertszczepanski robertszczepanski marked this pull request as ready for review September 4, 2023 15:18
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github-actions bot commented Sep 5, 2023

Changes In Tests

Tool New Failures New Passes Added Removed Not Affected
UhdmVerilator 0 0 0 0 4686
UhdmYosys 0 0 0 0 4671
Surelog 0 0 0 0 4671
moore_parse 0 0 0 0 4517
Slang 0 1 0 0 4670
Verible 0 0 0 0 4517
tree_sitter_verilog 0 0 0 0 4517
moore 0 0 0 0 4608
Odin 0 0 0 0 4608
sv_parser 0 0 0 0 4608
Verilator 0 1 0 0 4685
Sv2v_zachjs 0 0 0 0 4671
Icarus 0 0 0 0 4686
Slang_parse 0 0 0 0 4608
Yosys 0 1 0 0 4670
VeribleExtractor 0 0 0 0 4517

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@tmichalak tmichalak left a comment

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LGTM

@tmichalak tmichalak merged commit 4473791 into chipsalliance:master Sep 5, 2023
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Fix Veer-EL2 with Verilator
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