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Merge pull request #6141 from chipsalliance/dependabot/submodules/thi…
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…rd_party/tools/circt-verilog-19c4a3f

build(deps): bump third_party/tools/circt-verilog from `05664fa` to `19c4a3f`
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github-actions[bot] authored Sep 25, 2024
2 parents f30c5cc + 3fe6966 commit 34c93e7
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion third_party/tools/circt-verilog
Submodule circt-verilog updated 19 files
+45 −10 include/circt/Analysis/FIRRTLInstanceInfo.h
+6 −1 include/circt/Conversion/Passes.td
+3 −1 include/circt/Conversion/VerifToSMT.h
+63 −17 lib/Analysis/FIRRTLInstanceInfo.cpp
+25 −3 lib/Analysis/TestPasses.cpp
+1 −0 lib/Conversion/HWToSMT/CMakeLists.txt
+23 −1 lib/Conversion/HWToSMT/HWToSMT.cpp
+2 −0 lib/Conversion/VerifToSMT/CMakeLists.txt
+276 −7 lib/Conversion/VerifToSMT/VerifToSMT.cpp
+19 −18 lib/Dialect/FIRRTL/Transforms/AddSeqMemPorts.cpp
+4 −4 lib/Dialect/FIRRTL/Transforms/LowerMemory.cpp
+82 −60 lib/Dialect/LLHD/Transforms/ProcessLoweringPass.cpp
+66 −1 test/Analysis/firrtl-test-instance-info.mlir
+83 −0 test/Conversion/VerifToSMT/verif-to-smt-errors.mlir
+115 −3 test/Conversion/VerifToSMT/verif-to-smt.mlir
+48 −52 test/Dialect/FIRRTL/lower-memory.mlir
+87 −10 test/Dialect/LLHD/Transforms/processLowering.mlir
+0 −90 test/Dialect/LLHD/Transforms/processLoweringErrors.mlir
+7 −6 test/firtool/prefixMemory.fir

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