Upload only logs from generated tests of uvm classes

Signed-off-by: Ryszard Rozak <[email protected]>
chipsalliance · Sep 22, 2023 · 0bc03a1 · 0bc03a1
1 parent 0f2903a
commit 0bc03a1
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/.github/workflows/sv-tests-ci.yml b/.github/workflows/sv-tests-ci.yml
@@ -223,7 +223,7 @@ jobs:
           name: tests_summary
           path: |
             ./tests_summary/
-            ./out/
+            ./out/logs/Verilator/generated/uvm*
       - name: Find artifacts that are no longer needed
         id: get-artifacts-to-delete
         if: github.event_name == 'pull_request'