Merge remote-tracking branch 'origin/new_decoder' into dec-test

.gitmodules

@@ -1,9 +1,15 @@
-[submodule "hardfloat"]
-	path = hardfloat
+[submodule "dependencies/hardfloat"]
+	path = dependencies/hardfloat
 	url = https://github.com/ucb-bar/berkeley-hardfloat.git
-[submodule "torture"]
-	path = torture
-	url = https://github.com/ucb-bar/riscv-torture.git
-[submodule "cde"]
-	path = cde
+[submodule "dependencies/cde"]
+	path = dependencies/cde
 	url = https://github.com/chipsalliance/cde.git
+[submodule "dependencies/chisel"]
+	path = dependencies/chisel
+	url = https://github.com/chipsalliance/chisel.git
+[submodule "dependencies/rvdecoderdb"]
+	path = dependencies/rvdecoderdb
+	url = https://github.com/sequencer/rvdecoderdb.git
+[submodule "dependencies/riscv-opcodes"]
+	path = dependencies/riscv-opcodes
+	url = https://github.com/riscv/riscv-opcodes.git

build.sc

@@ -2,24 +2,40 @@ import mill._
 import mill.scalalib._
 import mill.scalalib.publish._
 import coursier.maven.MavenRepository
-import $file.hardfloat.common
-import $file.cde.common
+import $file.dependencies.hardfloat.common
+import $file.dependencies.cde.common
+import $file.dependencies.chisel.build
+import $file.dependencies.rvdecoderdb.common
 import $file.common
 
 object v {
-  val scala = "2.13.10"
+  val scala = "2.13.12"
   // the first version in this Map is the mainly supported version which will be used to run tests
   val chiselCrossVersions = Map(
     "5.0.0" -> (ivy"org.chipsalliance::chisel:5.0.0+30-115743e1-SNAPSHOT", ivy"org.chipsalliance:::chisel-plugin:5.0.0+30-115743e1-SNAPSHOT"),
+    // build from project from source
+    "source" -> (ivy"org.chipsalliance::chisel:99", ivy"org.chipsalliance:::chisel-plugin:99"),
   )
   val mainargs = ivy"com.lihaoyi::mainargs:0.5.0"
+  val oslib = ivy"com.lihaoyi::os-lib:0.9.1"
+  val upickle = ivy"com.lihaoyi::upickle:3.1.3"
   val json4sJackson = ivy"org.json4s::json4s-jackson:4.0.5"
   val scalaReflect = ivy"org.scala-lang:scala-reflect:${scala}"
   val sonatypesSnapshots = Seq(
     MavenRepository("https://s01.oss.sonatype.org/content/repositories/snapshots")
   )
 }
 
+// Build form source only for dev
+object chisel extends Chisel
+
+trait Chisel
+  extends millbuild.dependencies.chisel.build.Chisel {
+  def crossValue = v.scala
+  override def millSourcePath = os.pwd / "dependencies" / "chisel"
+  def scalaVersion = T(v.scala)
+}
+
 object macros extends Macros
 
 trait Macros
@@ -35,37 +51,54 @@ trait Macros
 object hardfloat extends mill.define.Cross[Hardfloat](v.chiselCrossVersions.keys.toSeq)
 
 trait Hardfloat
-  extends millbuild.hardfloat.common.HardfloatModule
+  extends millbuild.dependencies.hardfloat.common.HardfloatModule
     with RocketChipPublishModule
     with Cross.Module[String] {
 
   def scalaVersion: T[String] = T(v.scala)
 
-  override def millSourcePath = os.pwd / "hardfloat" / "hardfloat"
+  override def millSourcePath = os.pwd / "dependencies" / "hardfloat" / "hardfloat"
 
-  def chiselModule = None
+  def chiselModule = Option.when(crossValue == "source")(chisel)
 
-  def chiselPluginJar = None
+  def chiselPluginJar = T(Option.when(crossValue == "source")(chisel.pluginModule.jar()))
 
-  def chiselIvy = Some(v.chiselCrossVersions(crossValue)._1)
+  def chiselIvy = Option.when(crossValue != "source")(v.chiselCrossVersions(crossValue)._1)
 
-  def chiselPluginIvy = Some(v.chiselCrossVersions(crossValue)._2)
+  def chiselPluginIvy = Option.when(crossValue != "source")(v.chiselCrossVersions(crossValue)._2)
 
   def repositoriesTask = T.task(super.repositoriesTask() ++ v.sonatypesSnapshots)
 }
 
 object cde extends CDE
 
 trait CDE
-  extends millbuild.cde.common.CDEModule
+  extends millbuild.dependencies.cde.common.CDEModule
     with RocketChipPublishModule
     with ScalaModule {
 
   def scalaVersion: T[String] = T(v.scala)
 
-  override def millSourcePath = os.pwd / "cde" / "cde"
+  override def millSourcePath = os.pwd / "dependencies" / "cde" / "cde"
 }
 
+object rvdecoderdb extends RVDecoderDB
+
+trait RVDecoderDB
+  extends millbuild.dependencies.rvdecoderdb.common.RVDecoderDBJVMModule
+    with RocketChipPublishModule
+    with ScalaModule {
+
+  def scalaVersion: T[String] = T(v.scala)
+
+  def osLibIvy = v.oslib
+
+  def upickleIvy = v.upickle
+
+  override def millSourcePath = os.pwd / "dependencies" / "rvdecoderdb" / "rvdecoderdb"
+}
+
+
 object rocketchip extends Cross[RocketChip](v.chiselCrossVersions.keys.toSeq)
 
 trait RocketChip
@@ -77,20 +110,22 @@ trait RocketChip
 
   override def millSourcePath = super.millSourcePath / os.up
 
-  def chiselModule = None
+  def chiselModule = Option.when(crossValue == "source")(chisel)
 
-  def chiselPluginJar = None
+  def chiselPluginJar = T(Option.when(crossValue == "source")(chisel.pluginModule.jar()))
 
-  def chiselIvy = Some(v.chiselCrossVersions(crossValue)._1)
+  def chiselIvy = Option.when(crossValue != "source")(v.chiselCrossVersions(crossValue)._1)
 
-  def chiselPluginIvy = Some(v.chiselCrossVersions(crossValue)._2)
+  def chiselPluginIvy = Option.when(crossValue != "source")(v.chiselCrossVersions(crossValue)._2)
 
   def macrosModule = macros
 
   def hardfloatModule = hardfloat(crossValue)
 
   def cdeModule = cde
 
+  def rvdecoderdbModule = rvdecoderdb
+
   def mainargsIvy = v.mainargs
 
   def json4sJacksonIvy = v.json4sJackson
@@ -225,6 +260,7 @@ trait Emulator extends Cross.Module2[String, String] {
          |  ${mfccompiler.rtls().map(_.path.toString).mkString("\n")}
          |  TOP_MODULE TestHarness
          |  PREFIX VTestHarness
+         |  TRACE
          |  VERILATOR_ARGS ${verilatorArgs().mkString(" ")}
          |)
          |""".stripMargin
@@ -235,10 +271,11 @@ trait Emulator extends Cross.Module2[String, String] {
       Seq(
         // format: off
         "-Wno-UNOPTTHREADS", "-Wno-STMTDLY", "-Wno-LATCH", "-Wno-WIDTH", "--no-timing",
-        "--x-assign unique",
+        "--x-assign 0",
+        "--x-initial 0",
         """+define+PRINTF_COND=\$c\(\"verbose\",\"&&\",\"done_reset\"\)""",
         """+define+STOP_COND=\$c\(\"done_reset\"\)""",
-        "+define+RANDOMIZE_GARBAGE_ASSIGN",
+        "+define+RANDOM=0",
         "--output-split 20000",
         "--output-split-cfuncs 20000",
         "--max-num-width 1048576",
@@ -300,8 +337,8 @@ object emulator extends Cross[Emulator](
   //
   ("freechips.rocketchip.system.TestHarness", "freechips.rocketchip.system.DefaultRV32Config"),
   ("freechips.rocketchip.system.TestHarness", "freechips.rocketchip.system.DefaultFP16Config"),
-  ("freechips.rocketchip.system.TestHarness", "freechips.rocketchip.system.BitManipCryptoConfig"),
-  ("freechips.rocketchip.system.TestHarness", "freechips.rocketchip.system.BitManipCrypto32Config"),
+//  ("freechips.rocketchip.system.TestHarness", "freechips.rocketchip.system.BitManipCryptoConfig"),
+//  ("freechips.rocketchip.system.TestHarness", "freechips.rocketchip.system.BitManipCrypto32Config"),
 )
 
 object `runnable-riscv-test` extends mill.Cross[RiscvTest](

common.sc

@@ -45,11 +45,14 @@ trait RocketChipModule
   // should be cde/common.sc#CDEModule
   def cdeModule: ScalaModule
 
+  // should be dependencies/rvdecoderdb/common.sc#RVDecoderDB
+  def rvdecoderdbModule: ScalaModule
+
   def mainargsIvy: Dep
 
   def json4sJacksonIvy: Dep
 
-  override def moduleDeps = super.moduleDeps ++ Seq(macrosModule, hardfloatModule, cdeModule)
+  override def moduleDeps = super.moduleDeps ++ Seq(macrosModule, hardfloatModule, cdeModule, rvdecoderdbModule)
 
   override def ivyDeps = T(
     super.ivyDeps() ++ Agg(

src/main/scala/rocket/CustomInstructions.scala → src/main/scala/deprecate/rocket/CustomInstructions.scala

@@ -4,6 +4,7 @@
 package freechips.rocketchip.rocket
 
 import chisel3.util._
+import freechips.rocketchip.rocket._
 
 object CustomInstructions {
   def MNRET              = BitPat("b01110000001000000000000001110011")

src/main/scala/rocket/Decode.scala → src/main/scala/deprecate/rocket/Decode.scala

@@ -5,6 +5,7 @@ package freechips.rocketchip.rocket
 import chisel3._
 import chisel3.util.BitPat
 import chisel3.util.experimental.decode._
+import freechips.rocketchip.rocket._
 
 object DecodeLogic
 {

src/main/scala/rocket/IDecode.scala → src/main/scala/deprecate/rocket/IDecode.scala

@@ -7,6 +7,7 @@ import chisel3._
 import chisel3.util._
 import org.chipsalliance.cde.config.Parameters
 import freechips.rocketchip.util._
+import freechips.rocketchip.rocket._
 import Instructions._
 import CustomInstructions._
 

src/main/scala/rocket/Instructions.scala → src/main/scala/deprecate/rocket/Instructions.scala

@@ -4,6 +4,7 @@
 package freechips.rocketchip.rocket
 
 import chisel3.util._
+import freechips.rocketchip.rocket._
 
 /* make EXTENSIONS="rv_* rv64*" inst.chisel */