Add VCS args

chipsalliance · Dec 18, 2024 · 51a77f4 · 51a77f4
1 parent a1f5c9c
commit 51a77f4
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/verification/cocotb/common.mk b/verification/cocotb/common.mk
@@ -52,6 +52,7 @@ endif
 ifeq ($(SIM), vcs)
     COMPILE_ARGS += +define+VERILATOR
     COMPILE_ARGS += +libext+.sv +libext+.v
+    COMPILE_ARGS += +warn=noIWNF,noPCWM-W
     COMPILE_ARGS += $(foreach dir,$(VERILOG_INCLUDE_DIRS),-y $(dir))
 endif