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Add Integer property literals. (#125)
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mikeurbach authored Jul 28, 2023
1 parent 5d8c15c commit 29fbc96
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1 change: 1 addition & 0 deletions revision-history.yaml
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# additions to the specification should append entries here.
thisVersion:
spec:
- Add Integer property literals.
- Add property assignment.
- Add Integer property type.
- Add initial description of property types.
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41 changes: 35 additions & 6 deletions spec.md
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Expand Up @@ -2426,12 +2426,22 @@ module Example:
propassign propOut, propIn
```

The following example demonstrates a property assignment from a property literal
expression to a module's output property type port.

``` firrtl
module Example:
output propOut : Integer
propassign propOut, Integer(42)
```

# Expressions

FIRRTL expressions are used for creating constant integers, for referring to a
declared circuit component, for statically and dynamically accessing a nested
element within a component, for creating multiplexers, for performing primitive
operations, and for reading a remote reference to a probe.
FIRRTL expressions are used for creating constant integers, for creating
literal property type expressions, for referring to a declared circuit
component, for statically and dynamically accessing a nested element within a
component, for creating multiplexers, for performing primitive operations, and
for reading a remote reference to a probe.

## Constant Integer Expressions

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SInt(-0h2a)
```

## Property Literal Expressions

A literal property type expression can be created for a given property type.
The property type name is followed by an appropriate literal value for the
property type, enclosed in parentheses.

### Integer Property Literal Expresssions

A literal `Integer` property type expression can be created from an integer
literal. The following examples show literal `Integer` property type
expressions.

``` firrtl
Integer(42)
Integer(-42)
```

## Enum Expressions

An enumeration can be constructed by applying an enumeration type to a variant
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| reference , "[" , expr , "]" ;
ref_expr = ( "probe" | "rwprobe" ) , "(" , static_reference , ")"
| static_reference ;
property_literal_expr = "Integer", "(", int, ")" ;
property_expr = static_reference | property_literal_expr ;
(* Memory *)
ruw = "old" | "new" | "undefined" ;
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| "define" , static_reference , "=" , ref_expr , [ info ]
| force_release , [ info ]
| "connect" , reference , "," , expr , [ info ]
| "invalidate" , reference , [ info ] ;
| "propassign" , static_reference , "," , static_reference , [ info ]
| "invalidate" , reference , [ info ]
| "propassign" , static_reference , "," , property_expr , [ info ] ;
(* Module definitions *)
port = ( "input" | "output" ) , id , ":" , (type | type_property) , [ info ] ;
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