Skip to content

Commit

Permalink
Handle introduction of ref_typespec in UHDM/Surelog
Browse files Browse the repository at this point in the history
  • Loading branch information
hs-apotell committed Sep 20, 2023
1 parent afe293a commit d509ac6
Showing 1 changed file with 4 additions and 3 deletions.
7 changes: 4 additions & 3 deletions .github/workflows/yosys-plugin.yml
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,8 @@ name: 'yosys-systemverilog-plugin'

on:
push:
branches:
- master
pull_request:
workflow_dispatch:

jobs:

Expand Down Expand Up @@ -41,7 +40,7 @@ jobs:
# Make sure we always use https:// instead of git://
git config --global url.https://github.com/.insteadOf git://github.com/
# Use current main of the plugin repository...
git clone https://github.com/chipsalliance/systemverilog-plugin.git
git clone --depth 1 https://github.com/Apotell/synlig.git systemverilog-plugin
cd systemverilog-plugin
git submodule update --depth 1 --init --recursive \
third_party/yosys \
Expand All @@ -52,6 +51,8 @@ jobs:
- name: Setup Surelog
uses: actions/checkout@v2
with:
repository: 'Apotell/Surelog'
ref: rtts
submodules: recursive
fetch-depth: 0
path: 'systemverilog-plugin/third_party/surelog'
Expand Down

0 comments on commit d509ac6

Please sign in to comment.