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Merge pull request #3851 from alainmarcel/alainmarcel-patch-1
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function and multi word values
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@alaindargelas
alaindargelas authored Sep 12, 2023
2 parents d708b80 + efe4d0f commit 8bcc124
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Showing 96 changed files with 3,290 additions and 608 deletions.
2 changes: 2 additions & 0 deletions src/DesignCompile/CompileHelper.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3199,6 +3199,8 @@ UHDM::any* CompileHelper::defaultPatternAssignment(const UHDM::typespec* tps,
if (psize == -1) {
adjustUnsized(c, ncsize);
c->VpiSize(ncsize);
} else {
if (ncsize < c->VpiSize()) c->VpiSize(ncsize);
}
if (r) {
bool invalidValue = false;
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32 changes: 16 additions & 16 deletions tests/ArianeElab/ArianeElab.log
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Original file line number Diff line number Diff line change
Expand Up @@ -20226,7 +20226,7 @@ bit_typespec 377
byte_typespec 8
case_item 126
case_stmt 30
constant 8942
constant 8964
cont_assign 30
design 1
enum_const 933
Expand All @@ -20250,21 +20250,21 @@ int_typespec 1393
int_var 72
io_decl 224
logic_net 14
logic_typespec 1582
logic_var 98
logic_typespec 1590
logic_var 116
long_int_typespec 4
module_inst 48
module_inst 52
named_begin 5
operation 2040
package 6
packed_array_typespec 90
param_assign 1293
parameter 1512
param_assign 1309
parameter 1528
part_select 116
port 42
range 1818
range 1826
ref_module 6
ref_obj 1734
ref_obj 1740
ref_var 1
return_stmt 212
string_typespec 932
Expand All @@ -20290,7 +20290,7 @@ bit_typespec 377
byte_typespec 8
case_item 497
case_stmt 120
constant 9061
constant 9083
cont_assign 122
design 1
enum_const 933
Expand All @@ -20314,21 +20314,21 @@ int_typespec 1393
int_var 145
io_decl 573
logic_net 14
logic_typespec 1582
logic_var 206
logic_typespec 1590
logic_var 224
long_int_typespec 4
module_inst 52
module_inst 56
named_begin 5
operation 3360
package 6
packed_array_typespec 90
param_assign 1413
parameter 1512
param_assign 1429
parameter 1528
part_select 442
port 84
range 1818
range 1826
ref_module 6
ref_obj 3939
ref_obj 3945
ref_var 1
return_stmt 684
string_typespec 932
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32 changes: 16 additions & 16 deletions tests/ArianeElab2/ArianeElab2.log
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Expand Up @@ -20841,7 +20841,7 @@ bit_typespec 377
byte_typespec 8
case_item 126
case_stmt 30
constant 245500
constant 245522
cont_assign 4
design 1
enum_const 67037
Expand All @@ -20864,21 +20864,21 @@ int_typespec 1494
int_var 80
io_decl 224
logic_net 15
logic_typespec 51287
logic_var 99
logic_typespec 51295
logic_var 599
long_int_typespec 4
module_inst 577
module_inst 581
named_begin 5
operation 47170
package 6
packed_array_typespec 24866
param_assign 2764
parameter 2991
param_assign 2780
parameter 3007
part_select 92
port 42
range 92750
range 92758
ref_module 12
ref_obj 1775
ref_obj 1781
ref_var 2
return_stmt 212
string_typespec 29592
Expand All @@ -20903,7 +20903,7 @@ bit_typespec 377
byte_typespec 8
case_item 497
case_stmt 120
constant 245528
constant 245550
cont_assign 5
design 1
enum_const 67037
Expand All @@ -20926,21 +20926,21 @@ int_typespec 1494
int_var 153
io_decl 573
logic_net 15
logic_typespec 51287
logic_var 207
logic_typespec 51295
logic_var 707
long_int_typespec 4
module_inst 609
module_inst 613
named_begin 5
operation 48757
package 6
packed_array_typespec 24866
param_assign 4691
parameter 2991
param_assign 4707
parameter 3007
part_select 334
port 84
range 92750
range 92758
ref_module 12
ref_obj 4209
ref_obj 4215
ref_var 2
return_stmt 684
string_typespec 29592
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30 changes: 13 additions & 17 deletions tests/ArrayExprFuncArg/ArrayExprFuncArg.log
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Original file line number Diff line number Diff line change
Expand Up @@ -580,14 +580,13 @@ AST_DEBUG_END
[INF:UH0706] Creating UHDM Model...

=== UHDM Object Stats Begin (Non-Elaborated Model) ===
array_expr 3
array_typespec 9
array_var 1
assign_stmt 2
assignment 3
begin 9
bit_select 8
constant 117
constant 148
design 1
for_stmt 2
func_call 6
Expand All @@ -596,13 +595,14 @@ gen_if 5
gen_scope 8
gen_scope_array 8
if_stmt 1
int_typespec 21
int_typespec 20
int_var 6
io_decl 2
logic_var 4
module_inst 10
operation 31
param_assign 32
parameter 33
param_assign 38
parameter 39
range 12
ref_module 1
ref_obj 30
Expand All @@ -611,14 +611,13 @@ sys_task_call 4
[INF:UH0707] Elaborating UHDM...

=== UHDM Object Stats Begin (Elaborated Model) ===
array_expr 3
array_typespec 9
array_var 1
assign_stmt 4
assignment 6
begin 13
bit_select 12
constant 117
constant 148
design 1
for_stmt 4
func_call 6
Expand All @@ -627,13 +626,14 @@ gen_if 5
gen_scope 12
gen_scope_array 12
if_stmt 2
int_typespec 21
int_typespec 20
int_var 8
io_decl 4
logic_var 4
module_inst 10
operation 37
param_assign 32
parameter 33
param_assign 38
parameter 39
range 13
ref_module 1
ref_obj 44
Expand Down Expand Up @@ -1709,10 +1709,6 @@ design: (work@main)
|vpiDecompile:5
|vpiSize:32
|UINT:5
|vpiTypespec:
\_int_typespec: , line:34:12, endln:34:24
|vpiParent:
\_constant: , line:7:39, endln:7:40
|vpiConstType:9
|vpiOperand:
\_constant: , line:7:41, endln:7:42
Expand Down Expand Up @@ -1745,12 +1741,12 @@ design: (work@main)
\_constant: , line:34:37, endln:34:62
|vpiParent:
\_param_assign: , line:34:25, endln:34:62
|vpiDecompile:5
|vpiDecompile:32'b00000000000000000000000000000101
|vpiSize:32
|UINT:5
|BIN:00000000000000000000000000000101
|vpiTypespec:
\_int_typespec: , line:34:12, endln:34:24
|vpiConstType:9
|vpiConstType:3
|vpiLhs:
\_parameter: ([email protected]_VADDR), line:34:25, endln:34:34
|vpiTypedef:
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2 changes: 2 additions & 0 deletions tests/ArrayVarName/ArrayVarName.log
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Original file line number Diff line number Diff line change
Expand Up @@ -128,6 +128,7 @@ function 1
int_typespec 5
int_var 3
logic_net 1
logic_var 1
module_inst 4
operation 2
param_assign 2
Expand All @@ -153,6 +154,7 @@ function 2
int_typespec 5
int_var 7
logic_net 1
logic_var 1
module_inst 4
operation 3
param_assign 2
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20 changes: 10 additions & 10 deletions tests/BitSelectPartSelectInFunction/BitSelectPartSelectInFunction.log
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Original file line number Diff line number Diff line change
Expand Up @@ -204,7 +204,7 @@ assign_stmt 1
assignment 1
begin 1
bit_select 1
constant 31
constant 33
cont_assign 2
design 1
func_call 2
Expand All @@ -214,16 +214,16 @@ int_var 1
io_decl 1
logic_net 1
logic_typespec 4
logic_var 2
logic_var 3
module_inst 4
operation 2
packed_array_typespec 1
param_assign 2
parameter 2
param_assign 3
parameter 3
part_select 2
port 2
range 10
ref_obj 4
ref_obj 5
return_stmt 1
var_select 2
=== UHDM Object Stats End ===
Expand All @@ -234,7 +234,7 @@ assign_stmt 1
assignment 2
begin 2
bit_select 2
constant 31
constant 33
cont_assign 3
design 1
func_call 3
Expand All @@ -244,16 +244,16 @@ int_var 1
io_decl 2
logic_net 1
logic_typespec 4
logic_var 4
logic_var 5
module_inst 4
operation 3
packed_array_typespec 1
param_assign 2
parameter 2
param_assign 3
parameter 3
part_select 4
port 3
range 10
ref_obj 6
ref_obj 7
return_stmt 2
var_select 4
=== UHDM Object Stats End ===
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