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alaindargelas committed Sep 24, 2023
1 parent 4b85aec commit 3d4b338
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Showing 13 changed files with 735 additions and 721 deletions.
2 changes: 1 addition & 1 deletion .vscode/launch.json
Original file line number Diff line number Diff line change
Expand Up @@ -837,7 +837,7 @@
"type": "cppdbg",
"request": "launch",
"program": "${workspaceFolder}/dbuild/bin/surelog",
"args": ["-parse", "tests/ScratchPad.sv", "-d", "inst", "-synth", "-d", "ast", "-d", "uhdm", "-d", "uhdmstats", "-d", "vpi_ids", "-replay", "-nocache", "-nobuiltin"],
"args": ["-parse", "tests/ScratchPad.sv", "-elabuhdm", "-d", "inst", "-synth", "-d", "ast", "-d", "uhdm", "-d", "uhdmstats", "-d", "vpi_ids", "-replay", "-nocache", "-nobuiltin"],
"stopAtEntry": false,
"cwd": "${workspaceFolder}",
"environment": [],
Expand Down
36 changes: 18 additions & 18 deletions tests/DashYTest/DashYTest.log
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,22 @@ n<> u<21> t<Top_level_rule> c<1> l<1:1> el<4:1>
AST_DEBUG_END
AST_DEBUG_BEGIN
LIB: work
FILE: ${SURELOG_DIR}/tests/DashYTest/lib/AND.v
n<> u<0> t<_INVALID_> f<0> l<0:0>
n<> u<1> t<Null_rule> p<11> s<10> l<1:1> el<1:0>
n<module> u<2> t<Module_keyword> p<6> s<3> l<1:1> el<1:7>
n<AND> u<3> t<StringConst> p<6> s<5> l<1:8> el<1:11>
n<> u<4> t<Port> p<5> l<1:12> el<1:12>
n<> u<5> t<List_of_ports> p<6> c<4> l<1:11> el<1:13>
n<> u<6> t<Module_nonansi_header> p<8> c<2> s<7> l<1:1> el<1:14>
n<> u<7> t<ENDMODULE> p<8> l<2:1> el<2:10>
n<> u<8> t<Module_declaration> p<9> c<6> l<1:1> el<2:10>
n<> u<9> t<Description> p<10> c<8> l<1:1> el<2:10>
n<> u<10> t<Source_text> p<11> c<9> l<1:1> el<2:10>
n<> u<11> t<Top_level_rule> c<1> l<1:1> el<3:1>
AST_DEBUG_END
AST_DEBUG_BEGIN
LIB: work
FILE: ${SURELOG_DIR}/tests/DashYTest/lib/OR.v
n<> u<0> t<_INVALID_> f<0> l<0:0>
n<> u<1> t<Null_rule> p<11> s<10> l<1:1> el<1:0>
Expand Down Expand Up @@ -76,30 +92,14 @@ n<> u<27> t<Description> p<28> c<26> l<1:1> el<6:10>
n<> u<28> t<Source_text> p<29> c<27> l<1:1> el<6:10>
n<> u<29> t<Top_level_rule> c<1> l<1:1> el<7:1>
AST_DEBUG_END
AST_DEBUG_BEGIN
LIB: work
FILE: ${SURELOG_DIR}/tests/DashYTest/lib/AND.v
n<> u<0> t<_INVALID_> f<0> l<0:0>
n<> u<1> t<Null_rule> p<11> s<10> l<1:1> el<1:0>
n<module> u<2> t<Module_keyword> p<6> s<3> l<1:1> el<1:7>
n<AND> u<3> t<StringConst> p<6> s<5> l<1:8> el<1:11>
n<> u<4> t<Port> p<5> l<1:12> el<1:12>
n<> u<5> t<List_of_ports> p<6> c<4> l<1:11> el<1:13>
n<> u<6> t<Module_nonansi_header> p<8> c<2> s<7> l<1:1> el<1:14>
n<> u<7> t<ENDMODULE> p<8> l<2:1> el<2:10>
n<> u<8> t<Module_declaration> p<9> c<6> l<1:1> el<2:10>
n<> u<9> t<Description> p<10> c<8> l<1:1> el<2:10>
n<> u<10> t<Source_text> p<11> c<9> l<1:1> el<2:10>
n<> u<11> t<Top_level_rule> c<1> l<1:1> el<3:1>
AST_DEBUG_END
[WRN:PA0205] ${SURELOG_DIR}/tests/DashYTest/dut.sv:1:1: No timescale set for "top".

[WRN:PA0205] ${SURELOG_DIR}/tests/DashYTest/lib/AND.v:1:1: No timescale set for "AND".

[WRN:PA0205] ${SURELOG_DIR}/tests/DashYTest/lib/OR.v:1:1: No timescale set for "OR".

[WRN:PA0205] ${SURELOG_DIR}/tests/DashYTest/lib/SIM.v:1:1: No timescale set for "SIM".

[WRN:PA0205] ${SURELOG_DIR}/tests/DashYTest/lib/AND.v:1:1: No timescale set for "AND".

[INF:CP0300] Compilation...

[INF:CP0303] ${SURELOG_DIR}/tests/DashYTest/lib/AND.v:1:1: Compile module "work@AND".
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20 changes: 10 additions & 10 deletions tests/LibraryIntercon/LibraryIntercon.log
Original file line number Diff line number Diff line change
Expand Up @@ -9,47 +9,47 @@ LIB: work
${SURELOG_DIR}/tests/LibraryIntercon/lib.map

LIB: realLib
${SURELOG_DIR}/tests/LibraryIntercon/driver.svr
${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr
${SURELOG_DIR}/tests/LibraryIntercon/driver.svr

LIB: logicLib
${SURELOG_DIR}/tests/LibraryIntercon/top.sv
${SURELOG_DIR}/tests/LibraryIntercon/driver.sv
${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv
${SURELOG_DIR}/tests/LibraryIntercon/top.sv


[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/lib.map".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv".
[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg".
[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr".
[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.svr".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv".
[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.svr".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/driver.sv".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv".

[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: No timescale set for "NetsPkg".
[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/LibraryIntercon/top.sv".

[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/top.sv:1:1: No timescale set for "top".
[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: No timescale set for "NetsPkg".

[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/cmp.sv:2:1: No timescale set for "cmp".

[WRN:PA0205] ${SURELOG_DIR}/tests/LibraryIntercon/top.sv:1:1: No timescale set for "top".

[INF:CP0300] Compilation...

[INF:CP0301] ${SURELOG_DIR}/tests/LibraryIntercon/nets.pkg:1:1: Compile package "NetsPkg".
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12 changes: 6 additions & 6 deletions tests/OldLibrary/OldLibrary.log
Original file line number Diff line number Diff line change
Expand Up @@ -2,26 +2,26 @@

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/top.v".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v".

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/top.v".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v".

[INF:PA0201] Parsing source file "${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v".

[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/top.v:1:1: No timescale set for "top".

[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v:1:1: No timescale set for "CELL1".

[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL2.v:1:1: No timescale set for "CELL2".

[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL1.v:1:1: No timescale set for "CELL1".

[WRN:PA0205] ${SURELOG_DIR}/tests/OldLibrary/lib/CELL3.v:1:1: No timescale set for "CELL3".

[INF:CP0300] Compilation...
Expand Down
60 changes: 30 additions & 30 deletions tests/PreprocLine/PreprocLine.log
Original file line number Diff line number Diff line change
Expand Up @@ -16,38 +16,38 @@ n<top> u<3> t<StringConst> p<4> l<1:8> el<1:11>
n<> u<4> t<Module_ansi_header> p<66> c<2> s<64> l<1:1> el<1:12>
n<> u<5> t<Dollar_keyword> p<17> s<6> l<3:9> el<3:10>
n<display> u<6> t<StringConst> p<17> s<16> l<3:10> el<3:17>
n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t<StringLiteral> p<8> l<3:18> el<3:78>
n<> u<8> t<Primary_literal> p<9> c<7> l<3:18> el<3:78>
n<> u<9> t<Primary> p<10> c<8> l<3:18> el<3:78>
n<> u<10> t<Expression> p<16> c<9> s<15> l<3:18> el<3:78>
n<3> u<11> t<IntConst> p<12> l<3:80> el<3:81>
n<> u<12> t<Primary_literal> p<13> c<11> l<3:80> el<3:81>
n<> u<13> t<Primary> p<14> c<12> l<3:80> el<3:81>
n<> u<14> t<Expression> p<15> c<13> l<3:80> el<3:81>
n<> u<15> t<Argument> p<16> c<14> l<3:80> el<3:81>
n<> u<16> t<List_of_arguments> p<17> c<10> l<3:18> el<3:81>
n<> u<17> t<Subroutine_call> p<18> c<5> l<3:9> el<3:82>
n<> u<18> t<Subroutine_call_statement> p<19> c<17> l<3:9> el<3:83>
n<> u<19> t<Statement_item> p<20> c<18> l<3:9> el<3:83>
n<> u<20> t<Statement> p<21> c<19> l<3:9> el<3:83>
n<> u<21> t<Statement_or_null> p<57> c<20> s<38> l<3:9> el<3:83>
n<"${SURELOG_DIR}/tests/PreprocLine/dut.sv"> u<7> t<StringLiteral> p<8> l<3:18> el<3:64>
n<> u<8> t<Primary_literal> p<9> c<7> l<3:18> el<3:64>
n<> u<9> t<Primary> p<10> c<8> l<3:18> el<3:64>
n<> u<10> t<Expression> p<16> c<9> s<15> l<3:18> el<3:64>
n<3> u<11> t<IntConst> p<12> l<3:66> el<3:67>
n<> u<12> t<Primary_literal> p<13> c<11> l<3:66> el<3:67>
n<> u<13> t<Primary> p<14> c<12> l<3:66> el<3:67>
n<> u<14> t<Expression> p<15> c<13> l<3:66> el<3:67>
n<> u<15> t<Argument> p<16> c<14> l<3:66> el<3:67>
n<> u<16> t<List_of_arguments> p<17> c<10> l<3:18> el<3:67>
n<> u<17> t<Subroutine_call> p<18> c<5> l<3:9> el<3:68>
n<> u<18> t<Subroutine_call_statement> p<19> c<17> l<3:9> el<3:69>
n<> u<19> t<Statement_item> p<20> c<18> l<3:9> el<3:69>
n<> u<20> t<Statement> p<21> c<19> l<3:9> el<3:69>
n<> u<21> t<Statement_or_null> p<57> c<20> s<38> l<3:9> el<3:69>
n<> u<22> t<Dollar_keyword> p<34> s<23> l<5:9> el<5:10>
n<display> u<23> t<StringConst> p<34> s<33> l<5:10> el<5:17>
n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t<StringLiteral> p<25> l<5:18> el<5:78>
n<> u<25> t<Primary_literal> p<26> c<24> l<5:18> el<5:78>
n<> u<26> t<Primary> p<27> c<25> l<5:18> el<5:78>
n<> u<27> t<Expression> p<33> c<26> s<32> l<5:18> el<5:78>
n<102> u<28> t<IntConst> p<29> l<5:80> el<5:83>
n<> u<29> t<Primary_literal> p<30> c<28> l<5:80> el<5:83>
n<> u<30> t<Primary> p<31> c<29> l<5:80> el<5:83>
n<> u<31> t<Expression> p<32> c<30> l<5:80> el<5:83>
n<> u<32> t<Argument> p<33> c<31> l<5:80> el<5:83>
n<> u<33> t<List_of_arguments> p<34> c<27> l<5:18> el<5:83>
n<> u<34> t<Subroutine_call> p<35> c<22> l<5:9> el<5:84>
n<> u<35> t<Subroutine_call_statement> p<36> c<34> l<5:9> el<5:85>
n<> u<36> t<Statement_item> p<37> c<35> l<5:9> el<5:85>
n<> u<37> t<Statement> p<38> c<36> l<5:9> el<5:85>
n<> u<38> t<Statement_or_null> p<57> c<37> s<55> l<5:9> el<5:85>
n<"${SURELOG_DIR}/tests/PreprocLine/fake.v"> u<24> t<StringLiteral> p<25> l<5:18> el<5:64>
n<> u<25> t<Primary_literal> p<26> c<24> l<5:18> el<5:64>
n<> u<26> t<Primary> p<27> c<25> l<5:18> el<5:64>
n<> u<27> t<Expression> p<33> c<26> s<32> l<5:18> el<5:64>
n<102> u<28> t<IntConst> p<29> l<5:66> el<5:69>
n<> u<29> t<Primary_literal> p<30> c<28> l<5:66> el<5:69>
n<> u<30> t<Primary> p<31> c<29> l<5:66> el<5:69>
n<> u<31> t<Expression> p<32> c<30> l<5:66> el<5:69>
n<> u<32> t<Argument> p<33> c<31> l<5:66> el<5:69>
n<> u<33> t<List_of_arguments> p<34> c<27> l<5:18> el<5:69>
n<> u<34> t<Subroutine_call> p<35> c<22> l<5:9> el<5:70>
n<> u<35> t<Subroutine_call_statement> p<36> c<34> l<5:9> el<5:71>
n<> u<36> t<Statement_item> p<37> c<35> l<5:9> el<5:71>
n<> u<37> t<Statement> p<38> c<36> l<5:9> el<5:71>
n<> u<38> t<Statement_or_null> p<57> c<37> s<55> l<5:9> el<5:71>
n<> u<39> t<Dollar_keyword> p<51> s<40> f<0> l<10:9> el<10:10>
n<display> u<40> t<StringConst> p<51> s<50> f<0> l<10:10> el<10:17>
n<""> u<41> t<StringLiteral> p<42> f<0> l<10:18> el<10:20>
Expand Down
8 changes: 4 additions & 4 deletions tests/TestSepCompNoHash/TestSepCompNoHash.log
Original file line number Diff line number Diff line change
Expand Up @@ -27,18 +27,18 @@
[ NOTE] : 0
[INF:CM0023] Creating log file ${SURELOG_DIR}/tests/TestSepCompNoHash/slpp_all/surelog.log.

PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv
PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv
PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg2.sv
PP CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv
PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv
PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv
PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg2.sv
PARSER CACHE USED FOR: ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv
[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv:1:1: No timescale set for "top".

[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv:1:1: No timescale set for "pkg1".

[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg2.sv:1:1: No timescale set for "pkg2".

[WRN:PA0205] ${SURELOG_DIR}/tests/TestSepCompNoHash/top.sv:1:1: No timescale set for "top".

[INF:CP0300] Compilation...

[INF:CP0301] ${SURELOG_DIR}/tests/TestSepCompNoHash/pkg1.sv:1:1: Compile package "pkg1".
Expand Down
2 changes: 1 addition & 1 deletion tests/TypeDefScope/TypeDefScope.log
Original file line number Diff line number Diff line change
Expand Up @@ -1531,4 +1531,4 @@ design: (work@dut)
============================== Begin RoundTrip Results ==============================
[roundtrip]: ${SURELOG_DIR}/tests/TypeDefScope/builtin.sv | ${SURELOG_DIR}/build/regression/TypeDefScope/roundtrip/builtin_000.sv | 0 | 0 |
[roundtrip]: ${SURELOG_DIR}/tests/TypeDefScope/dut.sv | ${SURELOG_DIR}/build/regression/TypeDefScope/roundtrip/dut_000.sv | 2 | 18 |
============================== End RoundTrip Results ==============================
============================== End RoundTrip Results ==============================
2 changes: 1 addition & 1 deletion tests/UnitThisNew/UnitThisNew.log
Original file line number Diff line number Diff line change
Expand Up @@ -3150,4 +3150,4 @@ design: (unnamed)
============================== Begin RoundTrip Results ==============================
[roundtrip]: ${SURELOG_DIR}/tests/UnitThisNew/builtin.sv | ${SURELOG_DIR}/build/regression/UnitThisNew/roundtrip/builtin_000.sv | 0 | 0 |
[roundtrip]: ${SURELOG_DIR}/tests/UnitThisNew/dut.sv | ${SURELOG_DIR}/build/regression/UnitThisNew/roundtrip/dut_000.sv | 16 | 44 |
============================== End RoundTrip Results ==============================
============================== End RoundTrip Results ==============================
24 changes: 19 additions & 5 deletions third_party/tests/CoresSweRVMP/CoresSweRVMP.log
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@

[WRN:CM0010] Command line argument "-Wno-UNOPTFLAT" ignored.

Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 2
Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser; cmake -G "Unix Makefiles" .; make -j 16
CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
Compatibility with CMake < 3.5 will be removed from a future version of
CMake.
Expand All @@ -11,7 +11,7 @@ CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
CMake that the project does not need compatibility with older versions.


-- Configuring done (0.1s)
-- Configuring done (0.0s)
-- Generating done (0.0s)
-- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_parser
[100%] Generating preprocessing
Expand Down Expand Up @@ -122,7 +122,7 @@ PP CACHE USED FOR: ${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv

[INF:PP0122] Preprocessing source file "${SURELOG_DIR}/third_party/tests/CoresSweRVMP/design/lib/axi4_to_ahb.sv".

Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 2
Running: cd ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess; cmake -G "Unix Makefiles" .; make -j 16
CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
Compatibility with CMake < 3.5 will be removed from a future version of
CMake.
Expand All @@ -134,8 +134,22 @@ CMake Deprecation Warning at CMakeLists.txt:1 (cmake_minimum_required):
-- Configuring done (0.0s)
-- Generating done (0.0s)
-- Build files have been written to: ${SURELOG_DIR}/build/regression/CoresSweRVMP/slpp_all/mp_preprocess
[ 50%] Generating 1_axi4_to_ahb.sv
[100%] Generating 2_mem_lib.sv
[ 6%] Generating 10_lsu_bus_intf.sv
[ 12%] Generating 11_ifu_bp_ctl.sv
[ 18%] Generating 12_beh_lib.sv
[ 25%] Generating 13_ifu_mem_ctl.sv
[ 31%] Generating 14_mem_lib.sv
[ 37%] Generating 16_dec_decode_ctl.sv
[ 43%] Generating 1_lsu_stbuf.sv
[ 50%] Generating 15_exu.sv
[ 56%] Generating 2_ahb_to_axi4.sv
[ 62%] Generating 3_rvjtag_tap.sv
[ 68%] Generating 4_dec_tlu_ctl.sv
[ 75%] Generating 5_lsu_bus_buffer.sv
[ 81%] Generating 7_axi4_to_ahb.sv
[ 87%] Generating 6_dbg.sv
[ 93%] Generating 8_ifu_aln_ctl.sv
[100%] Generating 9_tb_top.sv
[100%] Built target Parse
Surelog parsing status: 0
[INF:PA0201] Parsing source file "${SURELOG_DIR}/third_party/UVM/1800.2-2017-1.0/src/uvm_pkg.sv".
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -28408,7 +28408,7 @@ var_select 16611
[ NOTE] : 111

============================== Begin Linting Results ==============================
[LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dv_macros_0/dv_macros.svh:476:262: Non synthesizable construct, name
[LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dv_macros_0/dv_macros.svh:476:248: Non synthesizable construct, name
[LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dpi_dmidpi_0.1/dmidpi.sv:25:12: Non synthesizable construct,
[LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dpi_dmidpi_0.1/dmidpi.sv:25:12: Non synthesizable construct,
[LINT]: ${SURELOG_DIR}/third_party/tests/Earlgrey_Verilator_01_05_21/src/lowrisc_dv_dpi_dmidpi_0.1/dmidpi.sv:28:35: Non synthesizable construct,
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