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const prop bits

const prop bits #1693

Workflow file for this run

name: 'yosys-systemverilog-plugin'
on:
push:
branches:
- master
pull_request:
jobs:
test-plugin:
runs-on: [self-hosted, Linux, X64, gcp-custom-runners]
container: ubuntu:jammy
defaults:
run:
shell: bash
strategy:
fail-fast: true
env:
CC: gcc-9
CXX: g++-9
CCACHE_DIR: "/root/Surelog/Surelog/.cache/"
DEBIAN_FRONTEND: noninteractive
steps:
- name: Install dependencies
run: |
apt-get update -qq
apt install -y software-properties-common
add-apt-repository ppa:ubuntu-toolchain-r/test
apt-get update -qq
apt install -y gcc-9 g++-9 build-essential cmake tclsh ant default-jre swig google-perftools libgoogle-perftools-dev python3 python3-dev python3-pip uuid uuid-dev tcl-dev flex libfl-dev git pkg-config libreadline-dev bison libffi-dev wget libtinfo5
update-alternatives --install /usr/bin/python python /usr/bin/python3 1
update-alternatives --install /usr/bin/pip pip /usr/bin/pip3 1
pip install orderedmultidict
- name: Setup plugin repository
run: |
# Github dropped support for unauthorized git: https://github.blog/2021-09-01-improving-git-protocol-security-github/
# Make sure we always use https:// instead of git://
git config --global url.https://github.com/.insteadOf git://github.com/
# Use current main of the plugin repository...
git clone https://github.com/chipsalliance/systemverilog-plugin.git
cd systemverilog-plugin
git submodule update --depth 1 --init --recursive \
third_party/yosys \
third_party/yosys_f4pga_plugins \
third_party/make_env \
third_party/ibex \
- name: Setup Surelog
uses: actions/checkout@v2
with:
submodules: recursive
fetch-depth: 0
path: 'systemverilog-plugin/third_party/surelog'
- name: Create Cache Timestamp
id: cache_timestamp
uses: nanzm/[email protected]
with:
format: 'YYYY-MM-DD-HH-mm-ss'
- name: Setup cache
uses: actions/cache@v2
with:
path: ${{ env.CCACHE_DIR }}
key: cache_${{ steps.cache_timestamp.outputs.time }}
restore-keys: cache_
- name: Build binaries
run: |
cd systemverilog-plugin
make -rR -j $(nproc) -Oline -f build_binaries.mk SYSTEMVERILOG_PLUGIN_ONLY:=0 \
install-surelog install-yosys install-plugins
- name: Build & Test Ibex
run: |
pip install virtualenv
cd systemverilog-plugin/tests
make -j 1 env TEST=ibex
make -j $(nproc) uhdm/yosys/synth-ibex-f4pga TEST=ibex ENABLE_READLINE=0 PRETTY=0
- uses: actions/upload-artifact@v2
with:
name: top_artya7.bit
path: ./systemverilog-plugin/tests/build/lowrisc_ibex_top_artya7_surelog_0.1/synth-symbiflow/top_artya7.bit
- name: Upload load graphs
uses: actions/upload-artifact@v2
with:
name: plots
path: |
**/plot_*.svg