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Signed-off-by: Haorong Lu <[email protected]>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,107 @@ | ||
| #ifndef __CR_ATOMIC_H__ | ||
| #define __CR_ATOMIC_H__ | ||
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| typedef uint32_t atomic_t; | ||
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| /* Copied from the Linux header arch/riscv/include/asm/barrier.h */ | ||
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| #define nop() __asm__ __volatile__("nop") | ||
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| #define RISCV_FENCE(p, s) __asm__ __volatile__("fence " #p "," #s : : : "memory") | ||
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| /* These barriers need to enforce ordering on both devices or memory. */ | ||
| #define mb() RISCV_FENCE(iorw, iorw) | ||
| #define rmb() RISCV_FENCE(ir, ir) | ||
| #define wmb() RISCV_FENCE(ow, ow) | ||
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| /* These barriers do not need to enforce ordering on devices, just memory. */ | ||
| #define __smp_mb() RISCV_FENCE(rw, rw) | ||
| #define __smp_rmb() RISCV_FENCE(r, r) | ||
| #define __smp_wmb() RISCV_FENCE(w, w) | ||
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| #define __smp_store_release(p, v) \ | ||
| do { \ | ||
| compiletime_assert_atomic_type(*p); \ | ||
| RISCV_FENCE(rw, w); \ | ||
| WRITE_ONCE(*p, v); \ | ||
| } while (0) | ||
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| #define __smp_load_acquire(p) \ | ||
| ({ \ | ||
| typeof(*p) ___p1 = READ_ONCE(*p); \ | ||
| compiletime_assert_atomic_type(*p); \ | ||
| RISCV_FENCE(r, rw); \ | ||
| ___p1; \ | ||
| }) | ||
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| /* Copied from the Linux kernel header arch/riscv/include/asm/atomic.h */ | ||
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| static inline int atomic_read(const atomic_t *v) | ||
| { | ||
| return (*(volatile int *)v); | ||
| } | ||
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| static inline void atomic_set(atomic_t *v, int i) | ||
| { | ||
| *v = i; | ||
| } | ||
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| #define atomic_get atomic_read | ||
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| static inline int atomic_add_return(int i, atomic_t *v) | ||
| { | ||
| int result; | ||
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| asm volatile("amoadd.w.aqrl %1, %2, %0" : "+A"(*v), "=r"(result) : "r"(i) : "memory"); | ||
| __smp_mb(); | ||
| return result + i; | ||
| } | ||
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| static inline int atomic_sub_return(int i, atomic_t *v) | ||
| { | ||
| return atomic_add_return(-i, v); | ||
| } | ||
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| static inline int atomic_inc(atomic_t *v) | ||
| { | ||
| return atomic_add_return(1, v) - 1; | ||
| } | ||
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| static inline int atomic_add(int val, atomic_t *v) | ||
| { | ||
| return atomic_add_return(val, v) - val; | ||
| } | ||
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| static inline int atomic_dec(atomic_t *v) | ||
| { | ||
| return atomic_sub_return(1, v) + 1; | ||
| } | ||
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| /* true if the result is 0, or false for all other cases. */ | ||
| #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) | ||
| #define atomic_dec_return(v) (atomic_sub_return(1, v)) | ||
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| #define atomic_inc_return(v) (atomic_add_return(1, v)) | ||
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| static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) | ||
| { | ||
| unsigned long tmp; | ||
| int oldval; | ||
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| __smp_mb(); | ||
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| asm volatile("1:\n" | ||
| " lr.w %1, %2\n" | ||
| " bne %1, %3, 2f\n" | ||
| " sc.w %0, %4, %2\n" | ||
| " bnez %0, 1b\n" | ||
| "2:" | ||
| : "=&r"(tmp), "=&r"(oldval), "+A"(*ptr) | ||
| : "r"(old), "r"(new) | ||
| : "memory"); | ||
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| __smp_mb(); | ||
| return oldval; | ||
| } | ||
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| #endif /* __CR_ATOMIC_H__ */ |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,6 +1,6 @@ | ||
| { 'deps': [ '/bin/sh', | ||
| '/sbin/iptables|/usr/sbin/iptables', | ||
| '/lib/xtables/libxt_standard.so|/usr/lib64/xtables/libxt_standard.so|/usr/lib/iptables/libxt_standard.so|/usr/lib/powerpc64le-linux-gnu/xtables/libxt_standard.so|/usr/lib/x86_64-linux-gnu/xtables/libxt_standard.so|/usr/lib/s390x-linux-gnu/xtables/libxt_standard.so|/usr/lib/xtables/libxt_standard.so|/usr/lib/aarch64-linux-gnu/xtables/libxt_standard.so', | ||
| '/lib/xtables/libxt_standard.so|/usr/lib64/xtables/libxt_standard.so|/usr/lib/iptables/libxt_standard.so|/usr/lib/powerpc64le-linux-gnu/xtables/libxt_standard.so|/usr/lib/x86_64-linux-gnu/xtables/libxt_standard.so|/usr/lib/s390x-linux-gnu/xtables/libxt_standard.so|/usr/lib/xtables/libxt_standard.so|/usr/lib/aarch64-linux-gnu/xtables/libxt_standard.so|/usr/lib/riscv64-linux-gnu/xtables/libxt_standard.so', | ||
| '/usr/bin/diff'], | ||
| 'flags': 'suid', | ||
| 'flavor': 'ns uns'} |
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