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Add supports to DVP #14

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merged 7 commits into from
Nov 9, 2024
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1 change: 1 addition & 0 deletions data/chips/CH32V307VCT6.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,7 @@ cores:
- "../peripherals/FV2x_V3x_SDIO.yaml"
- "../peripherals/FV2x_V3x_CAN1.yaml"
- "../peripherals/FV2x_V3x_CAN2.yaml"
- "../peripherals/V3x_DVP.yaml"

include_interrupts: "../interrupts/CH32V3.yaml"
include_dma_channels:
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2 changes: 2 additions & 0 deletions data/interrupts/CH32V3.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,8 @@ OTG_FS: 83
USBHS_WKUP: 84
# 85 - USBHS
USBHS: 85
# 86 - DVP global interrupt
DVP: 86
# 87 - USART6 global interrupt
USART6: 87
# 88 - USART7 global interrupt
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49 changes: 49 additions & 0 deletions data/peripherals/V3x_DVP.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,49 @@
- name: DVP
address: 0x50050000
registers:
kind: dvp
version: v3
block: DVP
rcc:
bus_clock: HCLK
kernel_clock: HCLK
enable:
register: AHBPCENR
field: DVP_EN
reset:
register: AHBRSTR
field: DVPRST
interrupts:
- signal: GLOBAL
interrupt: DVP
pins:
- pin: PA4
signal: HSYNC
- pin: PA5
signal: VSYNC
- pin: PA6
signal: PCLK
- pin: PA9
signal: D0
- pin: PA10
signal: D1
- pin: PC8
signal: D2
- pin: PC9
signal: D3
- pin: PC11
signal: D4
- pin: PB6
signal: D5
- pin: PB8
signal: D6
- pin: PB9
signal: D7
- pin: PC10
signal: D8
- pin: PC12
signal: D9
- pin: PD6
signal: D10
- pin: PD2
signal: D11
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