feat: dac v3

data/chips/CH32V303RBT6.yaml

@@ -51,6 +51,7 @@ cores:
       - "../peripherals/FV2x_V3x_SPI2.yaml"
       - "../peripherals/FV2x_V3x_I2C1.yaml"
       - "../peripherals/FV2x_V3x_I2C2.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V303RCT6.yaml

@@ -61,6 +61,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C1.yaml"
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V303VCT6.yaml

@@ -62,6 +62,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C1.yaml"
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V305FBP6.yaml

@@ -57,6 +57,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
       - "../peripherals/F2x_V3x_USBHS.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V305GBU6.yaml

@@ -63,6 +63,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
       - "../peripherals/F2x_V3x_USBHS.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V305RBT6.yaml

@@ -62,6 +62,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
       - "../peripherals/F2x_V3x_USBHS.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V307RCT6.yaml

@@ -69,6 +69,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
       - "../peripherals/F2x_V3x_USBHS.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V307VCT6.yaml

@@ -71,6 +71,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
       - "../peripherals/F2x_V3x_USBHS.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/chips/CH32V307WCU6.yaml

@@ -69,6 +69,7 @@ cores:
       - "../peripherals/FV2x_V3x_I2C2.yaml"
       - "../peripherals/F2x_V3x_RNG.yaml"
       - "../peripherals/F2x_V3x_USBHS.yaml"
+      - "../peripherals/FV2x_V3x_DAC.yaml"
 
     include_interrupts: "../interrupts/CH32V3.yaml"
     include_dma_channels:

data/dma/CH32V_V4F_DMA2.yaml

@@ -56,5 +56,5 @@ SPI3_RX: 1
 SPI3_TX: 2
 
 SDIO: 4
-DAC1: 3
-DAC2: 4
+DAC1_CH1: 3
+DAC1_CH2: 4

data/peripherals/FV2x_V3x_DAC.yaml

@@ -0,0 +1,22 @@
+# Digital-to-Analog Converter (DAC)
+- name: DAC1
+  address: 0x40007400
+  registers:
+    kind: dac
+    version: v3
+    block: DAC
+  rcc:
+    bus_clock: PCLK1
+    kernel_clock: PCLK1
+    enable:
+      register: APB1PCENR
+      field: DACEN
+    reset:
+      register: APB1PRSTR
+      field: DACRST
+  pins:
+    # Not available on V305 FB/GB
+    - pin: PA4
+      signal: OUT1
+    - pin: PA5
+      signal: OUT2

data/registers/dac_v3.yaml

@@ -47,7 +47,7 @@ block/DAC:
       byte_offset: 40
       fieldset: RD8BDHR
     - name: DOR
-      description: DAC channel1 data output register (DAC_DOR1).
+      description: DAC channel1/2 data output register (DAC_DOR1).
       array:
         len: 2
         stride: 4
@@ -57,66 +57,57 @@ block/DAC:
 fieldset/CTLR:
   description: Control register (DAC_CR).
   fields:
-    - name: EN1
+    - name: EN
       description: DAC channel1 enable.
       bit_offset: 0
       bit_size: 1
-    - name: BOFF1
+      array:
+        len: 2
+        stride: 16
+    - name: BOFF
       description: DAC channel1 output buffer disable.
       bit_offset: 1
       bit_size: 1
-    - name: TEN1
+      array:
+        len: 2
+        stride: 16
+    - name: TEN
       description: DAC channel1 trigger enable.
       bit_offset: 2
       bit_size: 1
-    - name: TSEL1
+      array:
+        len: 2
+        stride: 16
+    - name: TSEL
       description: DAC channel1 trigger selection.
       bit_offset: 3
       bit_size: 3
+      array:
+        len: 2
+        stride: 16
       enum: TRIG_SEL
-    - name: WAVE1
+    - name: WAVE
       description: DAC channel1 noise/triangle wave generation enable.
       bit_offset: 6
       bit_size: 2
+      array:
+        len: 2
+        stride: 16
       enum: WAVE
-    - name: MAMP1
+    - name: MAMP
       description: DAC channel1 mask/amplitude selector.
       bit_offset: 8
       bit_size: 4
-    - name: DMAEN1
+      array:
+        len: 2
+        stride: 16
+    - name: DMAEN
       description: DAC channel1 DMA enable.
       bit_offset: 12
       bit_size: 1
-    - name: EN2
-      description: DAC channel2 enable.
-      bit_offset: 16
-      bit_size: 1
-    - name: BOFF2
-      description: DAC channel2 output buffer disable.
-      bit_offset: 17
-      bit_size: 1
-    - name: TEN2
-      description: DAC channel2 trigger enable.
-      bit_offset: 18
-      bit_size: 1
-    - name: TSEL2
-      description: DAC channel2 trigger selection.
-      bit_offset: 19
-      bit_size: 3
-      enum: TRIG_SEL
-    - name: WAVE2
-      description: DAC channel2 noise/triangle wave generation enable.
-      bit_offset: 22
-      bit_size: 2
-      enum: WAVE
-    - name: MAMP2
-      description: DAC channel2 mask/amplitude selector.
-      bit_offset: 24
-      bit_size: 4
-    - name: DMAEN2
-      description: DAC channel2 DMA enable.
-      bit_offset: 28
-      bit_size: 1
+      array:
+        len: 2
+        stride: 16
 fieldset/DOR:
   description: DAC channel1 data output register (DAC_DOR1).
   fields: