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index #374

Triggered via schedule December 15, 2023 00:10
Status Success
Total duration 9m 26s
Artifacts 1

index.yml

on: schedule
update-revisions
24s
update-revisions
Matrix: index-cores
setup-default-service
22s
setup-default-service
Matrix: deploy-to-gcp
gcr-cleaner
25s
gcr-cleaner
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index-cores (caliptra-rtl, https://github.com/chipsalliance/caliptra-rtl, main, 7376eca80450a81d2...: home/runner/work/_actions/antmicro/verible-indexing-action/v1.1.1/build.sh#L39
verible-verilog-kythe-extractor: E1215 00:11:27.676174 2093 verilog_kythe_extractor.cc:218] Encountered some issues while indexing files (could result in missing indexing data): E1215 00:11:27.676940 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676943 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676945 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676946 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676948 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676949 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676951 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676953 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676955 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676957 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676959 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676960 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676962 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676963 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676965 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676966 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676968 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676969 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676970 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676972 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676974 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676976 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676978 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676979 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676981 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676982 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676984 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676985 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676987 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676989 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676990 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676992 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676993 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676995 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676996 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.676998 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677000 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677001 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677003 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677004 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677006 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677008 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677009 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677011 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677012 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677014 2093 verilog_kythe_extractor.cc:222] Syntax error. E1215 00:11:27.677015 2093 verilog_kythe_extractor.cc:222] Unable to find 'uvm_macros.svh' among the included paths: src/riscv_core/veer_el2/tb, src/riscv_core/veer_el2/rtl, src/keyvault/uvmf_kv/uvmf_template_output/project_benches/kv/tb/sequences/src, src/keyvault/uvmf_kv/uvmf_template_output/project_benches/kv/tb/tests/src, src/keyvault/uvmf_kv/uvmf_template_output/verification_ip/interface_packages/kv_read_pkg

Artifacts

Produced during runtime
Name Size
server-files Expired
168 MB