Enable unaligned load/store access in Spike ISS #99
mkurc-ant
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run-tests.yml
on: push
generate-config
9s
build-spike
/
Build Spike
5s
Matrix: generate-code
Matrix: run-tests
Annotations
16 errors
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generate-code (riscv_arithmetic_basic_test, uvm)
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generate-code (riscv_arithmetic_basic_test, pyflow)
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generate-code (riscv_ebreak_test, uvm)
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generate-code (riscv_illegal_instr_test, uvm)
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generate-code (riscv_full_interrupt_test, uvm)
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generate-code (riscv_hint_instr_test, uvm)
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generate-code (riscv_ebreak_debug_mode_test, uvm)
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generate-code (riscv_loop_test, uvm)
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generate-code (riscv_jump_stress_test, uvm)
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generate-code (riscv_non_compressed_instr_test, uvm)
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generate-code (riscv_pmp_test, uvm)
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generate-code (riscv_mmu_stress_test, uvm)
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generate-code (riscv_unaligned_load_store_test, uvm)
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generate-code (riscv_no_fence_test, uvm)
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generate-code (riscv_rand_instr_test, uvm)
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generate-code (riscv_rand_jump_test, uvm)
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