chore(PeriphDrivers): Fix C++ definitions, Update FCR registers to la…

…test design, and add BLE LDO SVD Enumerations for MAX32657(#1262) Co-authored-by: Woo <[email protected]>
analogdevicesinc · Nov 13, 2024 · 9bb8b50 · 9bb8b50
1 parent da894c7
commit 9bb8b50
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Showing 29 changed files with 246 additions and 68 deletions.
diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/aes_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/aes_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/aeskeys_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/aeskeys_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/boost_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/boost_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/crc_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/crc_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/dma_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/dma_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/fcr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/fcr_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile
@@ -114,12 +118,6 @@ typedef struct {
  * @brief    Function Control 0 Register.
  * @{
  */
-#define MXC_F_FCR_CTRL_BTLELDO_RF_POS                  0 /**< CTRL_BTLELDO_RF Position */
-#define MXC_F_FCR_CTRL_BTLELDO_RF                      ((uint32_t)(0x1FUL << MXC_F_FCR_CTRL_BTLELDO_RF_POS)) /**< CTRL_BTLELDO_RF Mask */
-
-#define MXC_F_FCR_CTRL_BTLELDO_BB_POS                  8 /**< CTRL_BTLELDO_BB Position */
-#define MXC_F_FCR_CTRL_BTLELDO_BB                      ((uint32_t)(0x1FUL << MXC_F_FCR_CTRL_BTLELDO_BB_POS)) /**< CTRL_BTLELDO_BB Mask */
-
 #define MXC_F_FCR_CTRL_I3CDGEN0_POS                    20 /**< CTRL_I3CDGEN0 Position */
 #define MXC_F_FCR_CTRL_I3CDGEN0                        ((uint32_t)(0x1UL << MXC_F_FCR_CTRL_I3CDGEN0_POS)) /**< CTRL_I3CDGEN0 Mask */
 
@@ -215,8 +213,8 @@ typedef struct {
  * @brief    Interrupt Flag Register.
  * @{
  */
-#define MXC_F_FCR_INTFL_ERTOC_RDY_POS                  0 /**< INTFL_ERTOC_RDY Position */
-#define MXC_F_FCR_INTFL_ERTOC_RDY                      ((uint32_t)(0x1UL << MXC_F_FCR_INTFL_ERTOC_RDY_POS)) /**< INTFL_ERTOC_RDY Mask */
+#define MXC_F_FCR_INTFL_ERFO_RDY_POS                   0 /**< INTFL_ERFO_RDY Position */
+#define MXC_F_FCR_INTFL_ERFO_RDY                       ((uint32_t)(0x1UL << MXC_F_FCR_INTFL_ERFO_RDY_POS)) /**< INTFL_ERFO_RDY Mask */
 
 #define MXC_F_FCR_INTFL_FRQCNT_POS                     1 /**< INTFL_FRQCNT Position */
 #define MXC_F_FCR_INTFL_FRQCNT                         ((uint32_t)(0x1UL << MXC_F_FCR_INTFL_FRQCNT_POS)) /**< INTFL_FRQCNT Mask */
@@ -229,8 +227,8 @@ typedef struct {
  * @brief    Interrupt Enable Register.
  * @{
  */
-#define MXC_F_FCR_INTEN_ERTOC_RDY_POS                  0 /**< INTEN_ERTOC_RDY Position */
-#define MXC_F_FCR_INTEN_ERTOC_RDY                      ((uint32_t)(0x1UL << MXC_F_FCR_INTEN_ERTOC_RDY_POS)) /**< INTEN_ERTOC_RDY Mask */
+#define MXC_F_FCR_INTEN_ERFO_RDY_POS                   0 /**< INTEN_ERFO_RDY Position */
+#define MXC_F_FCR_INTEN_ERFO_RDY                       ((uint32_t)(0x1UL << MXC_F_FCR_INTEN_ERFO_RDY_POS)) /**< INTEN_ERFO_RDY Mask */
 
 #define MXC_F_FCR_INTEN_FRQCNT_POS                     1 /**< INTEN_FRQCNT Position */
 #define MXC_F_FCR_INTEN_FRQCNT                         ((uint32_t)(0x1UL << MXC_F_FCR_INTEN_FRQCNT_POS)) /**< INTEN_FRQCNT Mask */

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/flc_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/flc_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/gcr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/gcr_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile
@@ -571,6 +575,14 @@ typedef struct {
 
 #define MXC_F_GCR_BTLELDOCTRL_BB_VSEL_POS              2 /**< BTLELDOCTRL_BB_VSEL Position */
 #define MXC_F_GCR_BTLELDOCTRL_BB_VSEL                  ((uint32_t)(0x3UL << MXC_F_GCR_BTLELDOCTRL_BB_VSEL_POS)) /**< BTLELDOCTRL_BB_VSEL Mask */
+#define MXC_V_GCR_BTLELDOCTRL_BB_VSEL_0_9              ((uint32_t)0x0UL) /**< BTLELDOCTRL_BB_VSEL_0_9 Value */
+#define MXC_S_GCR_BTLELDOCTRL_BB_VSEL_0_9              (MXC_V_GCR_BTLELDOCTRL_BB_VSEL_0_9 << MXC_F_GCR_BTLELDOCTRL_BB_VSEL_POS) /**< BTLELDOCTRL_BB_VSEL_0_9 Setting */
+#define MXC_V_GCR_BTLELDOCTRL_BB_VSEL_1_0              ((uint32_t)0x1UL) /**< BTLELDOCTRL_BB_VSEL_1_0 Value */
+#define MXC_S_GCR_BTLELDOCTRL_BB_VSEL_1_0              (MXC_V_GCR_BTLELDOCTRL_BB_VSEL_1_0 << MXC_F_GCR_BTLELDOCTRL_BB_VSEL_POS) /**< BTLELDOCTRL_BB_VSEL_1_0 Setting */
+#define MXC_V_GCR_BTLELDOCTRL_BB_VSEL_1_1              ((uint32_t)0x2UL) /**< BTLELDOCTRL_BB_VSEL_1_1 Value */
+#define MXC_S_GCR_BTLELDOCTRL_BB_VSEL_1_1              (MXC_V_GCR_BTLELDOCTRL_BB_VSEL_1_1 << MXC_F_GCR_BTLELDOCTRL_BB_VSEL_POS) /**< BTLELDOCTRL_BB_VSEL_1_1 Setting */
+#define MXC_V_GCR_BTLELDOCTRL_BB_VSEL_1_2              ((uint32_t)0x3UL) /**< BTLELDOCTRL_BB_VSEL_1_2 Value */
+#define MXC_S_GCR_BTLELDOCTRL_BB_VSEL_1_2              (MXC_V_GCR_BTLELDOCTRL_BB_VSEL_1_2 << MXC_F_GCR_BTLELDOCTRL_BB_VSEL_POS) /**< BTLELDOCTRL_BB_VSEL_1_2 Setting */
 
 #define MXC_F_GCR_BTLELDOCTRL_RF_EN_POS                4 /**< BTLELDOCTRL_RF_EN Position */
 #define MXC_F_GCR_BTLELDOCTRL_RF_EN                    ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_RF_EN_POS)) /**< BTLELDOCTRL_RF_EN Mask */
@@ -580,6 +592,14 @@ typedef struct {
 
 #define MXC_F_GCR_BTLELDOCTRL_RF_VSEL_POS              6 /**< BTLELDOCTRL_RF_VSEL Position */
 #define MXC_F_GCR_BTLELDOCTRL_RF_VSEL                  ((uint32_t)(0x3UL << MXC_F_GCR_BTLELDOCTRL_RF_VSEL_POS)) /**< BTLELDOCTRL_RF_VSEL Mask */
+#define MXC_V_GCR_BTLELDOCTRL_RF_VSEL_0_9              ((uint32_t)0x0UL) /**< BTLELDOCTRL_RF_VSEL_0_9 Value */
+#define MXC_S_GCR_BTLELDOCTRL_RF_VSEL_0_9              (MXC_V_GCR_BTLELDOCTRL_RF_VSEL_0_9 << MXC_F_GCR_BTLELDOCTRL_RF_VSEL_POS) /**< BTLELDOCTRL_RF_VSEL_0_9 Setting */
+#define MXC_V_GCR_BTLELDOCTRL_RF_VSEL_1_0              ((uint32_t)0x1UL) /**< BTLELDOCTRL_RF_VSEL_1_0 Value */
+#define MXC_S_GCR_BTLELDOCTRL_RF_VSEL_1_0              (MXC_V_GCR_BTLELDOCTRL_RF_VSEL_1_0 << MXC_F_GCR_BTLELDOCTRL_RF_VSEL_POS) /**< BTLELDOCTRL_RF_VSEL_1_0 Setting */
+#define MXC_V_GCR_BTLELDOCTRL_RF_VSEL_1_1              ((uint32_t)0x2UL) /**< BTLELDOCTRL_RF_VSEL_1_1 Value */
+#define MXC_S_GCR_BTLELDOCTRL_RF_VSEL_1_1              (MXC_V_GCR_BTLELDOCTRL_RF_VSEL_1_1 << MXC_F_GCR_BTLELDOCTRL_RF_VSEL_POS) /**< BTLELDOCTRL_RF_VSEL_1_1 Setting */
+#define MXC_V_GCR_BTLELDOCTRL_RF_VSEL_1_2              ((uint32_t)0x3UL) /**< BTLELDOCTRL_RF_VSEL_1_2 Value */
+#define MXC_S_GCR_BTLELDOCTRL_RF_VSEL_1_2              (MXC_V_GCR_BTLELDOCTRL_RF_VSEL_1_2 << MXC_F_GCR_BTLELDOCTRL_RF_VSEL_POS) /**< BTLELDOCTRL_RF_VSEL_1_2 Setting */
 
 #define MXC_F_GCR_BTLELDOCTRL_RF_BP_EN_POS             8 /**< BTLELDOCTRL_RF_BP_EN Position */
 #define MXC_F_GCR_BTLELDOCTRL_RF_BP_EN                 ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_RF_BP_EN_POS)) /**< BTLELDOCTRL_RF_BP_EN Mask */

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/gpio_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/gpio_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/i3c_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/i3c_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/icc_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/icc_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/max32657.svd b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/max32657.svd
@@ -1265,18 +1265,6 @@
      <addressOffset>0x00</addressOffset>
      <access>read-write</access>
      <fields>
-      <field>
-       <name>BTLELDO_RF</name>
-       <description>BTLE LDO RF Trim.</description>
-       <bitOffset>0</bitOffset>
-       <bitWidth>5</bitWidth>
-      </field>
-      <field>
-       <name>BTLELDO_BB</name>
-       <description>BTLE LDO BB Trim.</description>
-       <bitOffset>8</bitOffset>
-       <bitWidth>5</bitWidth>
-      </field>
       <field>
        <name>I3CDGEN0</name>
        <description>I3C SDA Glitch Filter Enable.</description>
@@ -1504,8 +1492,8 @@
      <access>read-write</access>
      <fields>
       <field>
-       <name>ERTOC_RDY</name>
-       <description>ERTCO 32K Ready.</description>
+       <name>ERFO_RDY</name>
+       <description>ERFO Ready.</description>
        <bitOffset>0</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
@@ -1524,8 +1512,8 @@
      <access>read-write</access>
      <fields>
       <field>
-       <name>ERTOC_RDY</name>
-       <description>ERTCO 32K Ready Interrupt Enable.</description>
+       <name>ERFO_RDY</name>
+       <description>ERFO Ready Interrupt Enable.</description>
        <bitOffset>0</bitOffset>
        <bitWidth>1</bitWidth>
       </field>
@@ -2808,6 +2796,28 @@
        <description>Voltage Selection for BB LDO.</description>
        <bitOffset>2</bitOffset>
        <bitWidth>2</bitWidth>
+       <enumeratedValues>
+        <enumeratedValue>
+         <name>0_9</name>
+         <description>0.9V</description>
+         <value>0</value>
+        </enumeratedValue>
+        <enumeratedValue>
+         <name>1_0</name>
+         <description>1.0V</description>
+         <value>1</value>
+        </enumeratedValue>
+        <enumeratedValue>
+         <name>1_1</name>
+         <description>1.1V</description>
+         <value>2</value>
+        </enumeratedValue>
+        <enumeratedValue>
+         <name>1_2</name>
+         <description>1.2V</description>
+         <value>3</value>
+        </enumeratedValue>
+       </enumeratedValues>
       </field>
       <field>
        <name>RF_EN</name>
@@ -2826,6 +2836,28 @@
        <description>LDO RF Voltage Setting.</description>
        <bitOffset>6</bitOffset>
        <bitWidth>2</bitWidth>
+       <enumeratedValues>
+        <enumeratedValue>
+         <name>0_9</name>
+         <description>0.9V</description>
+         <value>0</value>
+        </enumeratedValue>
+        <enumeratedValue>
+         <name>1_0</name>
+         <description>1.0V</description>
+         <value>1</value>
+        </enumeratedValue>
+        <enumeratedValue>
+         <name>1_1</name>
+         <description>1.1V</description>
+         <value>2</value>
+        </enumeratedValue>
+        <enumeratedValue>
+         <name>1_2</name>
+         <description>1.2V</description>
+         <value>3</value>
+        </enumeratedValue>
+       </enumeratedValues>
       </field>
       <field>
        <name>RF_BP_EN</name>

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/mcr_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/mcr_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/mpc_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/mpc_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/nspc_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/nspc_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/pwrseq_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/pwrseq_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/rstz_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/rstz_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/rtc_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/rtc_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile

diff --git a/Libraries/CMSIS/Device/Maxim/MAX32657/Include/sir_regs.h b/Libraries/CMSIS/Device/Maxim/MAX32657/Include/sir_regs.h
@@ -48,7 +48,11 @@ extern "C" {
 #define __IO volatile
 #endif
 #ifndef __I
-#define __I  volatile const
+#ifdef __cplusplus
+#define __I volatile
+#else
+#define __I volatile const
+#endif
 #endif
 #ifndef __O
 #define __O  volatile