Bump verif/core-v-verif from 6779193 to c7d2077
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Bumps [verif/core-v-verif](https://github.com/openhwgroup/core-v-verif) from `6779193` to `c7d2077`. - [Release notes](https://github.com/openhwgroup/core-v-verif/releases) - [Commits](openhwgroup/core-v-verif@6779193...c7d2077) --- updated-dependencies: - dependency-name: verif/core-v-verif dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
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Superseded by #26. |
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Bumps verif/core-v-verif from
6779193toc7d2077.Commits
c7d2077Merge pull request #2358 from MarioOpenHWGroup/feature/rvfi_decouplef96ece8[SPIKE] Add another patch for hartid4239df0Spike modificationsfd68dfdMerge pull request #2361 from ThalesSiliconSecurity/csr_pseudoa24f2a5Spike-disasm : fix CSR pseudo codeaa5fe84Merge pull request #2350 from MarioOpenHWGroup/feature/tandem-upgrade81926e6Typo correction and patch update568575bMerge pull request #2360 from GTumbush/illegal_instruction_test_scriptd87679aIllegal instuction generator for CV32E40P V1c692149Update riscv-isa-sim patchesDependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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