Updated README

.gitignore

@@ -30,15 +30,16 @@ build/
 *.D
 *.hex
 *.mem
+*.xpr
 *.a
 *.coe
 *.riscv
-uart
+#uart
 work-ver/*
 corev_apu/fpga/work-fpga
 corev_apu/fpga/reports/
 corev_apu/fpga/scripts/add_sources.tcl
-corev_apu/fpga/ariane.xpr
+corev_apu/fpga/cva6_fpga.xpr
 corev_apu/fpga/ariane.cache/
 corev_apu/fpga/ariane.hw/
 corev_apu/fpga/.Xil/

README.md

@@ -67,7 +67,7 @@ In our case, we use this cable to program software applications on the CV32A6 in
 
 2. Generate the bitstream of the FPGA platform:
 ```
-make cva6_fpga
+make cva6_fpga_ddr
 ```
 
 3. When the bitstream is generated, switch on Zybo board and run:
@@ -83,6 +83,11 @@ Now, the hardware is ready and the hyperterminal is connected to the UART output
 
 ## Build and boot Linux on the FPGA
 
+To use Linux, you need to generate the bitstream using:
+```
+make cva6_fpga_ddr
+```
+
 ### Building Linux
 
 This project uses Buildroot to build a small Linux image that can be run on CVA6. Several steps are needed before booting Linux. OpenSBI and U-Boot are used to interface with the CVA6 platform and provide needed functions to Linux. The `cva6-sdk` folder contains everything that is needed. To build the images, run: