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docs(linux): U-Boot: Update OSPI NAND offsets for J784S4
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Update the OSPI Documentation for J784S4 to align with SDK offsets

Signed-off-by: Prasanth Babu Mantena <[email protected]>
Signed-off-by: Santhosh Kumar K <[email protected]>
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Santhosh Kumar K authored and praneethbajjuri committed Dec 21, 2024
1 parent 007a9ba commit 338d124
Showing 1 changed file with 29 additions and 12 deletions.
41 changes: 29 additions & 12 deletions source/linux/Foundational_Components/U-Boot/UG-QSPI.rst
Original file line number Diff line number Diff line change
Expand Up @@ -1222,9 +1222,9 @@ Flash properties:
u-boot.img over tftp and then flash it to OSPI NOR/NAND at respective
addresses.

* OSPI NOR:
* OSPI NOR:

.. code-block:: console
.. code-block:: console
=> sf probe
=> tftp ${loadaddr} tiboot3.bin
Expand All @@ -1234,18 +1234,35 @@ Flash properties:
=> tftp ${loadaddr} u-boot.img
=> sf update $loadaddr 0x280000 $filesize
* OSPI NAND:
.. ifconfig:: CONFIG_part_variant in ('J742S2', 'J722S')

.. code-block:: console
* OSPI NAND:

=> mtd list
=> mtd erase spi-nand0
=> tftp $loadaddr tiboot3.bin
=> mtd write spi-nand0 $loadaddr 0x0 $filesize
=> tftp $loadaddr tispl.bin
=> mtd write spi-nand0 $loadaddr 0x80000 $filesize
=> tftp $loadaddr u-boot.img
=> mtd write spi-nand0 $loadaddr 0x280000 $filesize
.. code-block:: console
=> mtd list
=> mtd erase spi-nand0
=> tftp $loadaddr tiboot3.bin
=> mtd write spi-nand0 $loadaddr 0x0 $filesize
=> tftp $loadaddr tispl.bin
=> mtd write spi-nand0 $loadaddr 0x80000 $filesize
=> tftp $loadaddr u-boot.img
=> mtd write spi-nand0 $loadaddr 0x280000 $filesize
.. ifconfig:: CONFIG_part_variant in ('J784S4')

* OSPI NAND:

.. code-block:: console
=> mtd list
=> mtd erase spi-nand0
=> tftp $loadaddr tiboot3.bin
=> mtd write spi-nand0 $loadaddr 0x0 $filesize
=> tftp $loadaddr tispl.bin
=> mtd write spi-nand0 $loadaddr 0x100000 $filesize
=> tftp $loadaddr u-boot.img
=> mtd write spi-nand0 $loadaddr 0x300000 $filesize
**PHY calibration**

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